source: mainline/kernel/generic/src/ipc/irq.c@ 16f2dcc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 16f2dcc was 9233e9d, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 8 years ago

Return capability handle in SYS_IPC_IRQ_SUBSCRIBE separately from error code.

  • Property mode set to 100644
File size: 14.6 KB
RevLine 
[162f919]1/*
[df4ed85]2 * Copyright (c) 2006 Ondrej Palkovsky
3 * Copyright (c) 2006 Jakub Jermar
[162f919]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
[cc73a8a1]30/** @addtogroup genericipc
[b45c443]31 * @{
32 */
[da1bafb]33
[cc73a8a1]34/**
35 * @file
36 * @brief IRQ notification framework.
[bdc5c516]37 *
[8820544]38 * This framework allows applications to subscribe to receive a notification
[a5d0143]39 * when an interrupt is detected. The application may provide a simple
40 * 'top-half' handler as part of its registration, which can perform simple
41 * operations (read/write port/memory, add information to notification IPC
42 * message).
[bdc5c516]43 *
44 * The structure of a notification message is as follows:
[8820544]45 * - IMETHOD: interface and method as set by the SYS_IPC_IRQ_SUBSCRIBE syscall
[56c167c]46 * - ARG1: payload modified by a 'top-half' handler (scratch[1])
47 * - ARG2: payload modified by a 'top-half' handler (scratch[2])
48 * - ARG3: payload modified by a 'top-half' handler (scratch[3])
49 * - ARG4: payload modified by a 'top-half' handler (scratch[4])
50 * - ARG5: payload modified by a 'top-half' handler (scratch[5])
[43752b6]51 * - in_phone_hash: interrupt counter (may be needed to assure correct order
[228e490]52 * in multithreaded drivers)
[bdc5c516]53 */
54
[162f919]55#include <arch.h>
[63e27ef]56#include <assert.h>
[162f919]57#include <mm/slab.h>
[a996ae31]58#include <mm/page.h>
59#include <mm/km.h>
[162f919]60#include <errno.h>
[2b017ba]61#include <ddi/irq.h>
[162f919]62#include <ipc/ipc.h>
63#include <ipc/irq.h>
[e3c762cd]64#include <syscall/copy.h>
[d0c5901]65#include <console/console.h>
[253f35a1]66#include <print.h>
[a996ae31]67#include <macros.h>
[3f74275]68#include <cap/cap.h>
[a996ae31]69
70static void ranges_unmap(irq_pio_range_t *ranges, size_t rangecount)
71{
[56c167c]72 for (size_t i = 0; i < rangecount; i++) {
[472d813]73#ifdef IO_SPACE_BOUNDARY
[a996ae31]74 if ((void *) ranges[i].base >= IO_SPACE_BOUNDARY)
[472d813]75#endif
[a996ae31]76 km_unmap(ranges[i].base, ranges[i].size);
77 }
78}
79
80static int ranges_map_and_apply(irq_pio_range_t *ranges, size_t rangecount,
81 irq_cmd_t *cmds, size_t cmdcount)
82{
83 /* Copy the physical base addresses aside. */
[56c167c]84 uintptr_t *pbase = malloc(rangecount * sizeof(uintptr_t), 0);
85 for (size_t i = 0; i < rangecount; i++)
[a996ae31]86 pbase[i] = ranges[i].base;
[56c167c]87
[a996ae31]88 /* Map the PIO ranges into the kernel virtual address space. */
[56c167c]89 for (size_t i = 0; i < rangecount; i++) {
[472d813]90#ifdef IO_SPACE_BOUNDARY
[a996ae31]91 if ((void *) ranges[i].base < IO_SPACE_BOUNDARY)
92 continue;
[472d813]93#endif
[a996ae31]94 ranges[i].base = km_map(pbase[i], ranges[i].size,
95 PAGE_READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);
96 if (!ranges[i].base) {
97 ranges_unmap(ranges, i);
98 free(pbase);
99 return ENOMEM;
100 }
101 }
[56c167c]102
[a5d0143]103 /* Rewrite the IRQ code addresses from physical to kernel virtual. */
[56c167c]104 for (size_t i = 0; i < cmdcount; i++) {
[a996ae31]105 uintptr_t addr;
[f2bbe8c]106 size_t size;
[56c167c]107
[a996ae31]108 /* Process only commands that use an address. */
109 switch (cmds[i].cmd) {
110 case CMD_PIO_READ_8:
[56c167c]111 case CMD_PIO_WRITE_8:
112 case CMD_PIO_WRITE_A_8:
[f2bbe8c]113 size = 1;
114 break;
[56c167c]115 case CMD_PIO_READ_16:
116 case CMD_PIO_WRITE_16:
117 case CMD_PIO_WRITE_A_16:
[f2bbe8c]118 size = 2;
119 break;
[56c167c]120 case CMD_PIO_READ_32:
121 case CMD_PIO_WRITE_32:
122 case CMD_PIO_WRITE_A_32:
[f2bbe8c]123 size = 4;
[a996ae31]124 break;
125 default:
126 /* Move onto the next command. */
127 continue;
128 }
[56c167c]129
[a996ae31]130 addr = (uintptr_t) cmds[i].addr;
131
[56c167c]132 size_t j;
[a996ae31]133 for (j = 0; j < rangecount; j++) {
134 /* Find the matching range. */
[f2bbe8c]135 if (!iswithin(pbase[j], ranges[j].size, addr, size))
[a996ae31]136 continue;
[56c167c]137
[a996ae31]138 /* Switch the command to a kernel virtual address. */
139 addr -= pbase[j];
140 addr += ranges[j].base;
[56c167c]141
[a996ae31]142 cmds[i].addr = (void *) addr;
143 break;
[bd8c6537]144 }
[56c167c]145
[bd8c6537]146 if (j == rangecount) {
147 /*
148 * The address used in this command is outside of all
149 * defined ranges.
150 */
151 ranges_unmap(ranges, rangecount);
152 free(pbase);
153 return EINVAL;
154 }
[a996ae31]155 }
[56c167c]156
[a996ae31]157 free(pbase);
158 return EOK;
159}
[162f919]160
[a5d0143]161/** Statically check the top-half IRQ code
[8486c07]162 *
[a5d0143]163 * Check the top-half IRQ code for invalid or unsafe constructs.
[8486c07]164 *
165 */
166static int code_check(irq_cmd_t *cmds, size_t cmdcount)
167{
168 for (size_t i = 0; i < cmdcount; i++) {
169 /*
170 * Check for accepted ranges.
171 */
172 if (cmds[i].cmd >= CMD_LAST)
173 return EINVAL;
174
175 if (cmds[i].srcarg >= IPC_CALL_LEN)
176 return EINVAL;
177
178 if (cmds[i].dstarg >= IPC_CALL_LEN)
179 return EINVAL;
180
181 switch (cmds[i].cmd) {
182 case CMD_PREDICATE:
183 /*
184 * Check for control flow overflow.
185 * Note that jumping just beyond the last
186 * command is a correct behaviour.
187 */
188 if (i + cmds[i].value > cmdcount)
189 return EINVAL;
190
191 break;
192 default:
193 break;
194 }
195 }
196
197 return EOK;
198}
199
[a5d0143]200/** Free the top-half IRQ code.
[8b243f2]201 *
[a5d0143]202 * @param code Pointer to the top-half IRQ code.
[da1bafb]203 *
[8b243f2]204 */
[162f919]205static void code_free(irq_code_t *code)
206{
207 if (code) {
[a996ae31]208 ranges_unmap(code->ranges, code->rangecount);
209 free(code->ranges);
[162f919]210 free(code->cmds);
211 free(code);
212 }
213}
214
[a5d0143]215/** Copy the top-half IRQ code from userspace into the kernel.
[8b243f2]216 *
[a5d0143]217 * @param ucode Userspace address of the top-half IRQ code.
[da1bafb]218 *
[a5d0143]219 * @return Kernel address of the copied IRQ code.
[8b243f2]220 *
221 */
222static irq_code_t *code_from_uspace(irq_code_t *ucode)
[162f919]223{
[a996ae31]224 irq_pio_range_t *ranges = NULL;
225 irq_cmd_t *cmds = NULL;
[56c167c]226
[da1bafb]227 irq_code_t *code = malloc(sizeof(*code), 0);
228 int rc = copy_from_uspace(code, ucode, sizeof(*code));
[a996ae31]229 if (rc != EOK)
230 goto error;
[162f919]231
[a996ae31]232 if ((code->rangecount > IRQ_MAX_RANGE_COUNT) ||
233 (code->cmdcount > IRQ_MAX_PROG_SIZE))
234 goto error;
[da1bafb]235
[a996ae31]236 ranges = malloc(sizeof(code->ranges[0]) * code->rangecount, 0);
237 rc = copy_from_uspace(ranges, code->ranges,
238 sizeof(code->ranges[0]) * code->rangecount);
239 if (rc != EOK)
240 goto error;
[56c167c]241
[a996ae31]242 cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
243 rc = copy_from_uspace(cmds, code->cmds,
[8b243f2]244 sizeof(code->cmds[0]) * code->cmdcount);
[a996ae31]245 if (rc != EOK)
246 goto error;
[8486c07]247
248 rc = code_check(cmds, code->cmdcount);
249 if (rc != EOK)
250 goto error;
251
[a996ae31]252 rc = ranges_map_and_apply(ranges, code->rangecount, cmds,
253 code->cmdcount);
254 if (rc != EOK)
255 goto error;
[56c167c]256
[a996ae31]257 code->ranges = ranges;
258 code->cmds = cmds;
[56c167c]259
[162f919]260 return code;
[56c167c]261
[a996ae31]262error:
263 if (cmds)
264 free(cmds);
[56c167c]265
[a996ae31]266 if (ranges)
267 free(ranges);
[56c167c]268
[a996ae31]269 free(code);
270 return NULL;
[162f919]271}
272
[c1f68b0]273static void irq_hash_out(irq_t *irq)
274{
275 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
276 irq_spinlock_lock(&irq->lock, false);
277
278 if (irq->notif_cfg.hashed_in) {
279 /* Remove the IRQ from the uspace IRQ hash table. */
280 hash_table_remove_item(&irq_uspace_hash_table, &irq->link);
281 irq->notif_cfg.hashed_in = false;
282 }
283
284 irq_spinlock_unlock(&irq->lock, false);
285 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
286}
287
[48bcf49]288static void irq_destroy(void *arg)
289{
290 irq_t *irq = (irq_t *) arg;
291
[c1f68b0]292 irq_hash_out(irq);
293
[48bcf49]294 /* Free up the IRQ code and associated structures. */
295 code_free(irq->notif_cfg.code);
[82d515e9]296 slab_free(irq_cache, irq);
[48bcf49]297}
298
299static kobject_ops_t irq_kobject_ops = {
300 .destroy = irq_destroy
301};
302
[8820544]303/** Subscribe an answerbox as a receiving end for IRQ notifications.
[2b017ba]304 *
[56c167c]305 * @param box Receiving answerbox.
306 * @param inr IRQ number.
[a5d0143]307 * @param imethod Interface and method to be associated with the notification.
308 * @param ucode Uspace pointer to top-half IRQ code.
[56c167c]309 *
[9233e9d]310 * @param[out] uspace_handle Uspace pointer to IRQ capability handle
311 *
312 * @return Error code.
[2b017ba]313 *
314 */
[24abb85d]315int ipc_irq_subscribe(answerbox_t *box, inr_t inr, sysarg_t imethod,
[9233e9d]316 irq_code_t *ucode, cap_handle_t *uspace_handle)
[162f919]317{
[78ffb70]318 if ((inr < 0) || (inr > last_inr))
319 return ELIMIT;
[c822026]320
[da1bafb]321 irq_code_t *code;
[162f919]322 if (ucode) {
323 code = code_from_uspace(ucode);
324 if (!code)
325 return EBADMEM;
[da1bafb]326 } else
[162f919]327 code = NULL;
[c822026]328
[cecb0789]329 /*
[e9d15d9]330 * Allocate and populate the IRQ kernel object.
[cecb0789]331 */
[48bcf49]332 cap_handle_t handle = cap_alloc(TASK);
[3f74275]333 if (handle < 0)
334 return handle;
[63d8f43]335
[9233e9d]336 int rc = copy_to_uspace(uspace_handle, &handle, sizeof(cap_handle_t));
337 if (rc != EOK) {
338 cap_free(TASK, handle);
339 return rc;
340 }
341
[82d515e9]342 irq_t *irq = (irq_t *) slab_alloc(irq_cache, FRAME_ATOMIC);
[63d8f43]343 if (!irq) {
344 cap_free(TASK, handle);
345 return ENOMEM;
346 }
[48bcf49]347
348 kobject_t *kobject = malloc(sizeof(kobject_t), FRAME_ATOMIC);
349 if (!kobject) {
350 cap_free(TASK, handle);
[82d515e9]351 slab_free(irq_cache, irq);
[48bcf49]352 return ENOMEM;
353 }
[63d8f43]354
[cecb0789]355 irq_initialize(irq);
356 irq->inr = inr;
357 irq->claim = ipc_irq_top_half_claim;
[691eb52]358 irq->handler = ipc_irq_top_half_handler;
[4874c2d]359 irq->notif_cfg.notify = true;
[2b017ba]360 irq->notif_cfg.answerbox = box;
[228e490]361 irq->notif_cfg.imethod = imethod;
[2b017ba]362 irq->notif_cfg.code = code;
363 irq->notif_cfg.counter = 0;
[c822026]364
[cecb0789]365 /*
[9e87562]366 * Insert the IRQ structure into the uspace IRQ hash table.
[cecb0789]367 */
[da1bafb]368 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
369 irq_spinlock_lock(&irq->lock, false);
370
[48bcf49]371 irq->notif_cfg.hashed_in = true;
[82cbf8c6]372 hash_table_insert(&irq_uspace_hash_table, &irq->link);
[c822026]373
[da1bafb]374 irq_spinlock_unlock(&irq->lock, false);
375 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
[9e87562]376
[48bcf49]377 kobject_initialize(kobject, KOBJECT_TYPE_IRQ, irq, &irq_kobject_ops);
378 cap_publish(TASK, handle, kobject);
[da1bafb]379
[9233e9d]380 return EOK;
[cecb0789]381}
382
[8820544]383/** Unsubscribe task from IRQ notification.
[cecb0789]384 *
[3f74275]385 * @param box Answerbox associated with the notification.
386 * @param handle IRQ capability handle.
[56c167c]387 *
388 * @return EOK on success or a negative error code.
389 *
[cecb0789]390 */
[3f74275]391int ipc_irq_unsubscribe(answerbox_t *box, int handle)
[cecb0789]392{
[48bcf49]393 kobject_t *kobj = cap_unpublish(TASK, handle, KOBJECT_TYPE_IRQ);
394 if (!kobj)
[cecb0789]395 return ENOENT;
[9306cd7]396
[48bcf49]397 assert(kobj->irq->notif_cfg.answerbox == box);
398
[c1f68b0]399 irq_hash_out(kobj->irq);
[48bcf49]400
401 kobject_put(kobj);
[3f74275]402 cap_free(TASK, handle);
[cecb0789]403
404 return EOK;
405}
406
[8b243f2]407/** Add a call to the proper answerbox queue.
[2b017ba]408 *
[da1bafb]409 * Assume irq->lock is locked and interrupts disabled.
410 *
411 * @param irq IRQ structure referencing the target answerbox.
412 * @param call IRQ notification call.
[874621f]413 *
[2b017ba]414 */
415static void send_call(irq_t *irq, call_t *call)
[874621f]416{
[da1bafb]417 irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
[cfaa35a]418 list_append(&call->ab_link, &irq->notif_cfg.answerbox->irq_notifs);
[da1bafb]419 irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
420
[2b017ba]421 waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
[874621f]422}
423
[a5d0143]424/** Apply the top-half IRQ code to find out whether to accept the IRQ or not.
[874621f]425 *
[da1bafb]426 * @param irq IRQ structure.
427 *
[a5d0143]428 * @return IRQ_ACCEPT if the interrupt is accepted by the IRQ code.
429 * @return IRQ_DECLINE if the interrupt is not accepted byt the IRQ code.
[cecb0789]430 *
[874621f]431 */
[cecb0789]432irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
[874621f]433{
[cecb0789]434 irq_code_t *code = irq->notif_cfg.code;
[da1bafb]435 uint32_t *scratch = irq->notif_cfg.scratch;
[cecb0789]436
437 if (!irq->notif_cfg.notify)
438 return IRQ_DECLINE;
439
440 if (!code)
441 return IRQ_DECLINE;
442
[01e39cbe]443 for (size_t i = 0; i < code->cmdcount; i++) {
[da1bafb]444 uintptr_t srcarg = code->cmds[i].srcarg;
445 uintptr_t dstarg = code->cmds[i].dstarg;
[874621f]446
[cecb0789]447 switch (code->cmds[i].cmd) {
448 case CMD_PIO_READ_8:
[8486c07]449 scratch[dstarg] =
450 pio_read_8((ioport8_t *) code->cmds[i].addr);
[cecb0789]451 break;
452 case CMD_PIO_READ_16:
[8486c07]453 scratch[dstarg] =
454 pio_read_16((ioport16_t *) code->cmds[i].addr);
[cecb0789]455 break;
456 case CMD_PIO_READ_32:
[8486c07]457 scratch[dstarg] =
458 pio_read_32((ioport32_t *) code->cmds[i].addr);
[cecb0789]459 break;
460 case CMD_PIO_WRITE_8:
461 pio_write_8((ioport8_t *) code->cmds[i].addr,
462 (uint8_t) code->cmds[i].value);
463 break;
464 case CMD_PIO_WRITE_16:
465 pio_write_16((ioport16_t *) code->cmds[i].addr,
466 (uint16_t) code->cmds[i].value);
467 break;
468 case CMD_PIO_WRITE_32:
469 pio_write_32((ioport32_t *) code->cmds[i].addr,
470 (uint32_t) code->cmds[i].value);
471 break;
[9cdac5a]472 case CMD_PIO_WRITE_A_8:
[8486c07]473 pio_write_8((ioport8_t *) code->cmds[i].addr,
474 (uint8_t) scratch[srcarg]);
[9cdac5a]475 break;
476 case CMD_PIO_WRITE_A_16:
[8486c07]477 pio_write_16((ioport16_t *) code->cmds[i].addr,
478 (uint16_t) scratch[srcarg]);
[9cdac5a]479 break;
480 case CMD_PIO_WRITE_A_32:
[8486c07]481 pio_write_32((ioport32_t *) code->cmds[i].addr,
482 (uint32_t) scratch[srcarg]);
483 break;
484 case CMD_LOAD:
485 scratch[dstarg] = code->cmds[i].value;
[9cdac5a]486 break;
[8486c07]487 case CMD_AND:
488 scratch[dstarg] = scratch[srcarg] &
489 code->cmds[i].value;
[cecb0789]490 break;
491 case CMD_PREDICATE:
[8486c07]492 if (scratch[srcarg] == 0)
[cecb0789]493 i += code->cmds[i].value;
[8486c07]494
[cecb0789]495 break;
496 case CMD_ACCEPT:
497 return IRQ_ACCEPT;
498 case CMD_DECLINE:
499 default:
500 return IRQ_DECLINE;
501 }
[874621f]502 }
[01e39cbe]503
[cecb0789]504 return IRQ_DECLINE;
[874621f]505}
506
[cecb0789]507/* IRQ top-half handler.
[162f919]508 *
[2b017ba]509 * We expect interrupts to be disabled and the irq->lock already held.
[8b243f2]510 *
[da1bafb]511 * @param irq IRQ structure.
512 *
[162f919]513 */
[cecb0789]514void ipc_irq_top_half_handler(irq_t *irq)
[162f919]515{
[63e27ef]516 assert(irq);
[56c167c]517
[63e27ef]518 assert(interrupts_disabled());
519 assert(irq_spinlock_locked(&irq->lock));
[da1bafb]520
[2b017ba]521 if (irq->notif_cfg.answerbox) {
[da1bafb]522 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
[cecb0789]523 if (!call)
[d8f7362]524 return;
[cecb0789]525
[162f919]526 call->flags |= IPC_CALL_NOTIF;
[43752b6]527 /* Put a counter to the message */
[0c1a5d8a]528 call->priv = ++irq->notif_cfg.counter;
[da1bafb]529
[43752b6]530 /* Set up args */
[228e490]531 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
[cecb0789]532 IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
533 IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
534 IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
535 IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
536 IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
[da1bafb]537
[2b017ba]538 send_call(irq, call);
[162f919]539 }
540}
541
[cecb0789]542/** Send notification message.
[874621f]543 *
[da1bafb]544 * @param irq IRQ structure.
545 * @param a1 Driver-specific payload argument.
546 * @param a2 Driver-specific payload argument.
547 * @param a3 Driver-specific payload argument.
548 * @param a4 Driver-specific payload argument.
549 * @param a5 Driver-specific payload argument.
550 *
[162f919]551 */
[96b02eb9]552void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
553 sysarg_t a4, sysarg_t a5)
[162f919]554{
[da1bafb]555 irq_spinlock_lock(&irq->lock, true);
556
[cecb0789]557 if (irq->notif_cfg.answerbox) {
[da1bafb]558 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
[cecb0789]559 if (!call) {
[da1bafb]560 irq_spinlock_unlock(&irq->lock, true);
[cecb0789]561 return;
[b14e35f2]562 }
[da1bafb]563
[cecb0789]564 call->flags |= IPC_CALL_NOTIF;
565 /* Put a counter to the message */
566 call->priv = ++irq->notif_cfg.counter;
[da1bafb]567
[228e490]568 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
[cecb0789]569 IPC_SET_ARG1(call->data, a1);
570 IPC_SET_ARG2(call->data, a2);
571 IPC_SET_ARG3(call->data, a3);
572 IPC_SET_ARG4(call->data, a4);
573 IPC_SET_ARG5(call->data, a5);
574
575 send_call(irq, call);
[b14e35f2]576 }
[da1bafb]577
578 irq_spinlock_unlock(&irq->lock, true);
[162f919]579}
[b45c443]580
[cc73a8a1]581/** @}
[b45c443]582 */
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