source: mainline/kernel/generic/src/ipc/irq.c@ 11b285d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 11b285d was 11b285d, checked in by Jiří Zárevúcky <jiri.zarevucky@…>, 7 years ago

Use standard signature for malloc() in kernel.

The remaining instances of blocking allocation are replaced with
a new separate function named nfmalloc (short for non-failing malloc).

  • Property mode set to 100644
File size: 14.6 KB
RevLine 
[162f919]1/*
[df4ed85]2 * Copyright (c) 2006 Ondrej Palkovsky
3 * Copyright (c) 2006 Jakub Jermar
[162f919]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
[cc73a8a1]30/** @addtogroup genericipc
[b45c443]31 * @{
32 */
[da1bafb]33
[cc73a8a1]34/**
35 * @file
36 * @brief IRQ notification framework.
[bdc5c516]37 *
[8820544]38 * This framework allows applications to subscribe to receive a notification
[a5d0143]39 * when an interrupt is detected. The application may provide a simple
40 * 'top-half' handler as part of its registration, which can perform simple
41 * operations (read/write port/memory, add information to notification IPC
42 * message).
[bdc5c516]43 *
44 * The structure of a notification message is as follows:
[8820544]45 * - IMETHOD: interface and method as set by the SYS_IPC_IRQ_SUBSCRIBE syscall
[56c167c]46 * - ARG1: payload modified by a 'top-half' handler (scratch[1])
47 * - ARG2: payload modified by a 'top-half' handler (scratch[2])
48 * - ARG3: payload modified by a 'top-half' handler (scratch[3])
49 * - ARG4: payload modified by a 'top-half' handler (scratch[4])
50 * - ARG5: payload modified by a 'top-half' handler (scratch[5])
[43752b6]51 * - in_phone_hash: interrupt counter (may be needed to assure correct order
[228e490]52 * in multithreaded drivers)
[bdc5c516]53 */
54
[162f919]55#include <arch.h>
[63e27ef]56#include <assert.h>
[162f919]57#include <mm/slab.h>
[a996ae31]58#include <mm/page.h>
59#include <mm/km.h>
[162f919]60#include <errno.h>
[2b017ba]61#include <ddi/irq.h>
[162f919]62#include <ipc/ipc.h>
63#include <ipc/irq.h>
[e3c762cd]64#include <syscall/copy.h>
[d0c5901]65#include <console/console.h>
[253f35a1]66#include <print.h>
[a996ae31]67#include <macros.h>
[3f74275]68#include <cap/cap.h>
[a996ae31]69
70static void ranges_unmap(irq_pio_range_t *ranges, size_t rangecount)
71{
[56c167c]72 for (size_t i = 0; i < rangecount; i++) {
[472d813]73#ifdef IO_SPACE_BOUNDARY
[a996ae31]74 if ((void *) ranges[i].base >= IO_SPACE_BOUNDARY)
[472d813]75#endif
[a996ae31]76 km_unmap(ranges[i].base, ranges[i].size);
77 }
78}
79
[b7fd2a0]80static errno_t ranges_map_and_apply(irq_pio_range_t *ranges, size_t rangecount,
[a996ae31]81 irq_cmd_t *cmds, size_t cmdcount)
82{
83 /* Copy the physical base addresses aside. */
[11b285d]84 uintptr_t *pbase = malloc(rangecount * sizeof(uintptr_t));
[7473807]85 if (!pbase)
86 return ENOMEM;
[56c167c]87 for (size_t i = 0; i < rangecount; i++)
[a996ae31]88 pbase[i] = ranges[i].base;
[a35b458]89
[a996ae31]90 /* Map the PIO ranges into the kernel virtual address space. */
[56c167c]91 for (size_t i = 0; i < rangecount; i++) {
[472d813]92#ifdef IO_SPACE_BOUNDARY
[a996ae31]93 if ((void *) ranges[i].base < IO_SPACE_BOUNDARY)
94 continue;
[472d813]95#endif
[a996ae31]96 ranges[i].base = km_map(pbase[i], ranges[i].size,
97 PAGE_READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);
98 if (!ranges[i].base) {
99 ranges_unmap(ranges, i);
100 free(pbase);
101 return ENOMEM;
102 }
103 }
[a35b458]104
[a5d0143]105 /* Rewrite the IRQ code addresses from physical to kernel virtual. */
[56c167c]106 for (size_t i = 0; i < cmdcount; i++) {
[a996ae31]107 uintptr_t addr;
[f2bbe8c]108 size_t size;
[a35b458]109
[a996ae31]110 /* Process only commands that use an address. */
111 switch (cmds[i].cmd) {
112 case CMD_PIO_READ_8:
[56c167c]113 case CMD_PIO_WRITE_8:
114 case CMD_PIO_WRITE_A_8:
[f2bbe8c]115 size = 1;
116 break;
[56c167c]117 case CMD_PIO_READ_16:
118 case CMD_PIO_WRITE_16:
119 case CMD_PIO_WRITE_A_16:
[f2bbe8c]120 size = 2;
121 break;
[56c167c]122 case CMD_PIO_READ_32:
123 case CMD_PIO_WRITE_32:
124 case CMD_PIO_WRITE_A_32:
[f2bbe8c]125 size = 4;
[a996ae31]126 break;
127 default:
128 /* Move onto the next command. */
129 continue;
130 }
[a35b458]131
[a996ae31]132 addr = (uintptr_t) cmds[i].addr;
[a35b458]133
[56c167c]134 size_t j;
[a996ae31]135 for (j = 0; j < rangecount; j++) {
136 /* Find the matching range. */
[f2bbe8c]137 if (!iswithin(pbase[j], ranges[j].size, addr, size))
[a996ae31]138 continue;
[a35b458]139
[a996ae31]140 /* Switch the command to a kernel virtual address. */
141 addr -= pbase[j];
142 addr += ranges[j].base;
[a35b458]143
[a996ae31]144 cmds[i].addr = (void *) addr;
145 break;
[bd8c6537]146 }
[a35b458]147
[bd8c6537]148 if (j == rangecount) {
149 /*
150 * The address used in this command is outside of all
151 * defined ranges.
152 */
153 ranges_unmap(ranges, rangecount);
154 free(pbase);
155 return EINVAL;
156 }
[a996ae31]157 }
[a35b458]158
[a996ae31]159 free(pbase);
160 return EOK;
161}
[162f919]162
[a5d0143]163/** Statically check the top-half IRQ code
[8486c07]164 *
[a5d0143]165 * Check the top-half IRQ code for invalid or unsafe constructs.
[8486c07]166 *
167 */
[b7fd2a0]168static errno_t code_check(irq_cmd_t *cmds, size_t cmdcount)
[8486c07]169{
170 for (size_t i = 0; i < cmdcount; i++) {
171 /*
172 * Check for accepted ranges.
173 */
174 if (cmds[i].cmd >= CMD_LAST)
175 return EINVAL;
[a35b458]176
[8486c07]177 if (cmds[i].srcarg >= IPC_CALL_LEN)
178 return EINVAL;
[a35b458]179
[8486c07]180 if (cmds[i].dstarg >= IPC_CALL_LEN)
181 return EINVAL;
[a35b458]182
[8486c07]183 switch (cmds[i].cmd) {
184 case CMD_PREDICATE:
185 /*
186 * Check for control flow overflow.
187 * Note that jumping just beyond the last
188 * command is a correct behaviour.
189 */
190 if (i + cmds[i].value > cmdcount)
191 return EINVAL;
[a35b458]192
[8486c07]193 break;
194 default:
195 break;
196 }
197 }
[a35b458]198
[8486c07]199 return EOK;
200}
201
[a5d0143]202/** Free the top-half IRQ code.
[8b243f2]203 *
[a5d0143]204 * @param code Pointer to the top-half IRQ code.
[da1bafb]205 *
[8b243f2]206 */
[162f919]207static void code_free(irq_code_t *code)
208{
209 if (code) {
[a996ae31]210 ranges_unmap(code->ranges, code->rangecount);
211 free(code->ranges);
[162f919]212 free(code->cmds);
213 free(code);
214 }
215}
216
[a5d0143]217/** Copy the top-half IRQ code from userspace into the kernel.
[8b243f2]218 *
[a5d0143]219 * @param ucode Userspace address of the top-half IRQ code.
[da1bafb]220 *
[a5d0143]221 * @return Kernel address of the copied IRQ code.
[8b243f2]222 *
223 */
224static irq_code_t *code_from_uspace(irq_code_t *ucode)
[162f919]225{
[a996ae31]226 irq_pio_range_t *ranges = NULL;
227 irq_cmd_t *cmds = NULL;
[a35b458]228
[11b285d]229 irq_code_t *code = malloc(sizeof(*code));
[7473807]230 if (!code)
231 return NULL;
[b7fd2a0]232 errno_t rc = copy_from_uspace(code, ucode, sizeof(*code));
[a996ae31]233 if (rc != EOK)
234 goto error;
[a35b458]235
[a996ae31]236 if ((code->rangecount > IRQ_MAX_RANGE_COUNT) ||
237 (code->cmdcount > IRQ_MAX_PROG_SIZE))
238 goto error;
[a35b458]239
[11b285d]240 ranges = malloc(sizeof(code->ranges[0]) * code->rangecount);
[7473807]241 if (!ranges)
242 goto error;
[a996ae31]243 rc = copy_from_uspace(ranges, code->ranges,
244 sizeof(code->ranges[0]) * code->rangecount);
245 if (rc != EOK)
246 goto error;
[a35b458]247
[11b285d]248 cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount);
[7473807]249 if (!cmds)
250 goto error;
[a996ae31]251 rc = copy_from_uspace(cmds, code->cmds,
[8b243f2]252 sizeof(code->cmds[0]) * code->cmdcount);
[a996ae31]253 if (rc != EOK)
254 goto error;
[a35b458]255
[8486c07]256 rc = code_check(cmds, code->cmdcount);
257 if (rc != EOK)
258 goto error;
[a35b458]259
[a996ae31]260 rc = ranges_map_and_apply(ranges, code->rangecount, cmds,
261 code->cmdcount);
262 if (rc != EOK)
263 goto error;
[a35b458]264
[a996ae31]265 code->ranges = ranges;
266 code->cmds = cmds;
[a35b458]267
[162f919]268 return code;
[a35b458]269
[a996ae31]270error:
271 if (cmds)
272 free(cmds);
[a35b458]273
[a996ae31]274 if (ranges)
275 free(ranges);
[a35b458]276
[a996ae31]277 free(code);
278 return NULL;
[162f919]279}
280
[c1f68b0]281static void irq_hash_out(irq_t *irq)
282{
283 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
284 irq_spinlock_lock(&irq->lock, false);
[a35b458]285
[c1f68b0]286 if (irq->notif_cfg.hashed_in) {
287 /* Remove the IRQ from the uspace IRQ hash table. */
288 hash_table_remove_item(&irq_uspace_hash_table, &irq->link);
289 irq->notif_cfg.hashed_in = false;
290 }
291
292 irq_spinlock_unlock(&irq->lock, false);
293 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
294}
295
[48bcf49]296static void irq_destroy(void *arg)
297{
298 irq_t *irq = (irq_t *) arg;
299
[c1f68b0]300 irq_hash_out(irq);
301
[48bcf49]302 /* Free up the IRQ code and associated structures. */
303 code_free(irq->notif_cfg.code);
[82d515e9]304 slab_free(irq_cache, irq);
[48bcf49]305}
306
307static kobject_ops_t irq_kobject_ops = {
308 .destroy = irq_destroy
309};
310
[8820544]311/** Subscribe an answerbox as a receiving end for IRQ notifications.
[2b017ba]312 *
[56c167c]313 * @param box Receiving answerbox.
314 * @param inr IRQ number.
[a5d0143]315 * @param imethod Interface and method to be associated with the notification.
316 * @param ucode Uspace pointer to top-half IRQ code.
[56c167c]317 *
[9233e9d]318 * @param[out] uspace_handle Uspace pointer to IRQ capability handle
319 *
320 * @return Error code.
[2b017ba]321 *
322 */
[b7fd2a0]323errno_t ipc_irq_subscribe(answerbox_t *box, inr_t inr, sysarg_t imethod,
[eadaeae8]324 irq_code_t *ucode, cap_irq_handle_t *uspace_handle)
[162f919]325{
[78ffb70]326 if ((inr < 0) || (inr > last_inr))
327 return ELIMIT;
[a35b458]328
[da1bafb]329 irq_code_t *code;
[162f919]330 if (ucode) {
331 code = code_from_uspace(ucode);
332 if (!code)
333 return EBADMEM;
[da1bafb]334 } else
[162f919]335 code = NULL;
[a35b458]336
[cecb0789]337 /*
[e9d15d9]338 * Allocate and populate the IRQ kernel object.
[cecb0789]339 */
[09d01f2]340 cap_handle_t handle;
[b7fd2a0]341 errno_t rc = cap_alloc(TASK, &handle);
[09d01f2]342 if (rc != EOK)
343 return rc;
[a35b458]344
[09d01f2]345 rc = copy_to_uspace(uspace_handle, &handle, sizeof(cap_handle_t));
[9233e9d]346 if (rc != EOK) {
347 cap_free(TASK, handle);
348 return rc;
349 }
350
[82d515e9]351 irq_t *irq = (irq_t *) slab_alloc(irq_cache, FRAME_ATOMIC);
[63d8f43]352 if (!irq) {
353 cap_free(TASK, handle);
354 return ENOMEM;
355 }
[48bcf49]356
[11b285d]357 kobject_t *kobject = malloc(sizeof(kobject_t));
[48bcf49]358 if (!kobject) {
359 cap_free(TASK, handle);
[82d515e9]360 slab_free(irq_cache, irq);
[48bcf49]361 return ENOMEM;
362 }
[a35b458]363
[cecb0789]364 irq_initialize(irq);
365 irq->inr = inr;
366 irq->claim = ipc_irq_top_half_claim;
[691eb52]367 irq->handler = ipc_irq_top_half_handler;
[4874c2d]368 irq->notif_cfg.notify = true;
[2b017ba]369 irq->notif_cfg.answerbox = box;
[228e490]370 irq->notif_cfg.imethod = imethod;
[2b017ba]371 irq->notif_cfg.code = code;
372 irq->notif_cfg.counter = 0;
[a35b458]373
[cecb0789]374 /*
[9e87562]375 * Insert the IRQ structure into the uspace IRQ hash table.
[cecb0789]376 */
[da1bafb]377 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
378 irq_spinlock_lock(&irq->lock, false);
[a35b458]379
[48bcf49]380 irq->notif_cfg.hashed_in = true;
[82cbf8c6]381 hash_table_insert(&irq_uspace_hash_table, &irq->link);
[a35b458]382
[da1bafb]383 irq_spinlock_unlock(&irq->lock, false);
384 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
[9e87562]385
[48bcf49]386 kobject_initialize(kobject, KOBJECT_TYPE_IRQ, irq, &irq_kobject_ops);
387 cap_publish(TASK, handle, kobject);
[a35b458]388
[9233e9d]389 return EOK;
[cecb0789]390}
391
[8820544]392/** Unsubscribe task from IRQ notification.
[cecb0789]393 *
[3f74275]394 * @param box Answerbox associated with the notification.
395 * @param handle IRQ capability handle.
[56c167c]396 *
[cde999a]397 * @return EOK on success or an error code.
[56c167c]398 *
[cecb0789]399 */
[eadaeae8]400errno_t ipc_irq_unsubscribe(answerbox_t *box, cap_irq_handle_t handle)
[cecb0789]401{
[48bcf49]402 kobject_t *kobj = cap_unpublish(TASK, handle, KOBJECT_TYPE_IRQ);
403 if (!kobj)
[cecb0789]404 return ENOENT;
[a35b458]405
[48bcf49]406 assert(kobj->irq->notif_cfg.answerbox == box);
407
[c1f68b0]408 irq_hash_out(kobj->irq);
[48bcf49]409
410 kobject_put(kobj);
[3f74275]411 cap_free(TASK, handle);
[a35b458]412
[cecb0789]413 return EOK;
414}
415
[8b243f2]416/** Add a call to the proper answerbox queue.
[2b017ba]417 *
[da1bafb]418 * Assume irq->lock is locked and interrupts disabled.
419 *
420 * @param irq IRQ structure referencing the target answerbox.
421 * @param call IRQ notification call.
[874621f]422 *
[2b017ba]423 */
424static void send_call(irq_t *irq, call_t *call)
[874621f]425{
[da1bafb]426 irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
[cfaa35a]427 list_append(&call->ab_link, &irq->notif_cfg.answerbox->irq_notifs);
[da1bafb]428 irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
[a35b458]429
[2b017ba]430 waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
[874621f]431}
432
[a5d0143]433/** Apply the top-half IRQ code to find out whether to accept the IRQ or not.
[874621f]434 *
[da1bafb]435 * @param irq IRQ structure.
436 *
[a5d0143]437 * @return IRQ_ACCEPT if the interrupt is accepted by the IRQ code.
438 * @return IRQ_DECLINE if the interrupt is not accepted byt the IRQ code.
[cecb0789]439 *
[874621f]440 */
[cecb0789]441irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
[874621f]442{
[cecb0789]443 irq_code_t *code = irq->notif_cfg.code;
[da1bafb]444 uint32_t *scratch = irq->notif_cfg.scratch;
[a35b458]445
[cecb0789]446 if (!irq->notif_cfg.notify)
447 return IRQ_DECLINE;
[a35b458]448
[cecb0789]449 if (!code)
450 return IRQ_DECLINE;
[a35b458]451
[01e39cbe]452 for (size_t i = 0; i < code->cmdcount; i++) {
[da1bafb]453 uintptr_t srcarg = code->cmds[i].srcarg;
454 uintptr_t dstarg = code->cmds[i].dstarg;
[a35b458]455
[cecb0789]456 switch (code->cmds[i].cmd) {
457 case CMD_PIO_READ_8:
[8486c07]458 scratch[dstarg] =
459 pio_read_8((ioport8_t *) code->cmds[i].addr);
[cecb0789]460 break;
461 case CMD_PIO_READ_16:
[8486c07]462 scratch[dstarg] =
463 pio_read_16((ioport16_t *) code->cmds[i].addr);
[cecb0789]464 break;
465 case CMD_PIO_READ_32:
[8486c07]466 scratch[dstarg] =
467 pio_read_32((ioport32_t *) code->cmds[i].addr);
[cecb0789]468 break;
469 case CMD_PIO_WRITE_8:
470 pio_write_8((ioport8_t *) code->cmds[i].addr,
471 (uint8_t) code->cmds[i].value);
472 break;
473 case CMD_PIO_WRITE_16:
474 pio_write_16((ioport16_t *) code->cmds[i].addr,
475 (uint16_t) code->cmds[i].value);
476 break;
477 case CMD_PIO_WRITE_32:
478 pio_write_32((ioport32_t *) code->cmds[i].addr,
479 (uint32_t) code->cmds[i].value);
480 break;
[9cdac5a]481 case CMD_PIO_WRITE_A_8:
[8486c07]482 pio_write_8((ioport8_t *) code->cmds[i].addr,
483 (uint8_t) scratch[srcarg]);
[9cdac5a]484 break;
485 case CMD_PIO_WRITE_A_16:
[8486c07]486 pio_write_16((ioport16_t *) code->cmds[i].addr,
487 (uint16_t) scratch[srcarg]);
[9cdac5a]488 break;
489 case CMD_PIO_WRITE_A_32:
[8486c07]490 pio_write_32((ioport32_t *) code->cmds[i].addr,
491 (uint32_t) scratch[srcarg]);
492 break;
493 case CMD_LOAD:
494 scratch[dstarg] = code->cmds[i].value;
[9cdac5a]495 break;
[8486c07]496 case CMD_AND:
497 scratch[dstarg] = scratch[srcarg] &
498 code->cmds[i].value;
[cecb0789]499 break;
500 case CMD_PREDICATE:
[8486c07]501 if (scratch[srcarg] == 0)
[cecb0789]502 i += code->cmds[i].value;
[a35b458]503
[cecb0789]504 break;
505 case CMD_ACCEPT:
506 return IRQ_ACCEPT;
507 case CMD_DECLINE:
508 default:
509 return IRQ_DECLINE;
510 }
[874621f]511 }
[a35b458]512
[cecb0789]513 return IRQ_DECLINE;
[874621f]514}
515
[cecb0789]516/* IRQ top-half handler.
[162f919]517 *
[2b017ba]518 * We expect interrupts to be disabled and the irq->lock already held.
[8b243f2]519 *
[da1bafb]520 * @param irq IRQ structure.
521 *
[162f919]522 */
[cecb0789]523void ipc_irq_top_half_handler(irq_t *irq)
[162f919]524{
[63e27ef]525 assert(irq);
[a35b458]526
[63e27ef]527 assert(interrupts_disabled());
528 assert(irq_spinlock_locked(&irq->lock));
[a35b458]529
[2b017ba]530 if (irq->notif_cfg.answerbox) {
[da1bafb]531 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
[cecb0789]532 if (!call)
[d8f7362]533 return;
[a35b458]534
[162f919]535 call->flags |= IPC_CALL_NOTIF;
[43752b6]536 /* Put a counter to the message */
[0c1a5d8a]537 call->priv = ++irq->notif_cfg.counter;
[a35b458]538
[43752b6]539 /* Set up args */
[228e490]540 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
[cecb0789]541 IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
542 IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
543 IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
544 IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
545 IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
[a35b458]546
[2b017ba]547 send_call(irq, call);
[162f919]548 }
549}
550
[cecb0789]551/** Send notification message.
[874621f]552 *
[da1bafb]553 * @param irq IRQ structure.
554 * @param a1 Driver-specific payload argument.
555 * @param a2 Driver-specific payload argument.
556 * @param a3 Driver-specific payload argument.
557 * @param a4 Driver-specific payload argument.
558 * @param a5 Driver-specific payload argument.
559 *
[162f919]560 */
[96b02eb9]561void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
562 sysarg_t a4, sysarg_t a5)
[162f919]563{
[da1bafb]564 irq_spinlock_lock(&irq->lock, true);
[a35b458]565
[cecb0789]566 if (irq->notif_cfg.answerbox) {
[da1bafb]567 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
[cecb0789]568 if (!call) {
[da1bafb]569 irq_spinlock_unlock(&irq->lock, true);
[cecb0789]570 return;
[b14e35f2]571 }
[a35b458]572
[cecb0789]573 call->flags |= IPC_CALL_NOTIF;
574 /* Put a counter to the message */
575 call->priv = ++irq->notif_cfg.counter;
[a35b458]576
[228e490]577 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
[cecb0789]578 IPC_SET_ARG1(call->data, a1);
579 IPC_SET_ARG2(call->data, a2);
580 IPC_SET_ARG3(call->data, a3);
581 IPC_SET_ARG4(call->data, a4);
582 IPC_SET_ARG5(call->data, a5);
[a35b458]583
[cecb0789]584 send_call(irq, call);
[b14e35f2]585 }
[a35b458]586
[da1bafb]587 irq_spinlock_unlock(&irq->lock, true);
[162f919]588}
[b45c443]589
[cc73a8a1]590/** @}
[b45c443]591 */
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