[162f919] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Ondrej Palkovsky
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| 3 | * Copyright (c) 2006 Jakub Jermar
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[162f919] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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[174156fd] | 30 | /** @addtogroup kernel_generic_ipc
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[b45c443] | 31 | * @{
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| 32 | */
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[da1bafb] | 33 |
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[cc73a8a1] | 34 | /**
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| 35 | * @file
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| 36 | * @brief IRQ notification framework.
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[bdc5c516] | 37 | *
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[8820544] | 38 | * This framework allows applications to subscribe to receive a notification
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[a5d0143] | 39 | * when an interrupt is detected. The application may provide a simple
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| 40 | * 'top-half' handler as part of its registration, which can perform simple
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| 41 | * operations (read/write port/memory, add information to notification IPC
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| 42 | * message).
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[bdc5c516] | 43 | *
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| 44 | * The structure of a notification message is as follows:
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[8820544] | 45 | * - IMETHOD: interface and method as set by the SYS_IPC_IRQ_SUBSCRIBE syscall
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[56c167c] | 46 | * - ARG1: payload modified by a 'top-half' handler (scratch[1])
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| 47 | * - ARG2: payload modified by a 'top-half' handler (scratch[2])
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| 48 | * - ARG3: payload modified by a 'top-half' handler (scratch[3])
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| 49 | * - ARG4: payload modified by a 'top-half' handler (scratch[4])
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| 50 | * - ARG5: payload modified by a 'top-half' handler (scratch[5])
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[167616c] | 51 | * - request_label: interrupt counter (may be needed to assure correct order
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[228e490] | 52 | * in multithreaded drivers)
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[bdc5c516] | 53 | */
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| 54 |
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[162f919] | 55 | #include <arch.h>
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[63e27ef] | 56 | #include <assert.h>
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[162f919] | 57 | #include <mm/slab.h>
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[a996ae31] | 58 | #include <mm/page.h>
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| 59 | #include <mm/km.h>
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[162f919] | 60 | #include <errno.h>
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[2b017ba] | 61 | #include <ddi/irq.h>
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[162f919] | 62 | #include <ipc/ipc.h>
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| 63 | #include <ipc/irq.h>
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[e3c762cd] | 64 | #include <syscall/copy.h>
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[d0c5901] | 65 | #include <console/console.h>
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[a996ae31] | 66 | #include <macros.h>
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[3f74275] | 67 | #include <cap/cap.h>
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[aafed15] | 68 | #include <stdlib.h>
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[a996ae31] | 69 |
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| 70 | static void ranges_unmap(irq_pio_range_t *ranges, size_t rangecount)
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| 71 | {
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[56c167c] | 72 | for (size_t i = 0; i < rangecount; i++) {
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[472d813] | 73 | #ifdef IO_SPACE_BOUNDARY
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[a996ae31] | 74 | if ((void *) ranges[i].base >= IO_SPACE_BOUNDARY)
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[472d813] | 75 | #endif
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[a996ae31] | 76 | km_unmap(ranges[i].base, ranges[i].size);
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| 77 | }
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| 78 | }
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| 79 |
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[b7fd2a0] | 80 | static errno_t ranges_map_and_apply(irq_pio_range_t *ranges, size_t rangecount,
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[a996ae31] | 81 | irq_cmd_t *cmds, size_t cmdcount)
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| 82 | {
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| 83 | /* Copy the physical base addresses aside. */
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[11b285d] | 84 | uintptr_t *pbase = malloc(rangecount * sizeof(uintptr_t));
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[7473807] | 85 | if (!pbase)
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| 86 | return ENOMEM;
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[56c167c] | 87 | for (size_t i = 0; i < rangecount; i++)
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[a996ae31] | 88 | pbase[i] = ranges[i].base;
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[a35b458] | 89 |
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[a996ae31] | 90 | /* Map the PIO ranges into the kernel virtual address space. */
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[56c167c] | 91 | for (size_t i = 0; i < rangecount; i++) {
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[472d813] | 92 | #ifdef IO_SPACE_BOUNDARY
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[a996ae31] | 93 | if ((void *) ranges[i].base < IO_SPACE_BOUNDARY)
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| 94 | continue;
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[472d813] | 95 | #endif
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[a996ae31] | 96 | ranges[i].base = km_map(pbase[i], ranges[i].size,
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[a1b9f63] | 97 | KM_NATURAL_ALIGNMENT,
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[a996ae31] | 98 | PAGE_READ | PAGE_WRITE | PAGE_KERNEL | PAGE_NOT_CACHEABLE);
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| 99 | if (!ranges[i].base) {
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| 100 | ranges_unmap(ranges, i);
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| 101 | free(pbase);
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| 102 | return ENOMEM;
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| 103 | }
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| 104 | }
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[a35b458] | 105 |
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[a5d0143] | 106 | /* Rewrite the IRQ code addresses from physical to kernel virtual. */
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[56c167c] | 107 | for (size_t i = 0; i < cmdcount; i++) {
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[a996ae31] | 108 | uintptr_t addr;
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[f2bbe8c] | 109 | size_t size;
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[a35b458] | 110 |
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[a996ae31] | 111 | /* Process only commands that use an address. */
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| 112 | switch (cmds[i].cmd) {
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| 113 | case CMD_PIO_READ_8:
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[56c167c] | 114 | case CMD_PIO_WRITE_8:
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| 115 | case CMD_PIO_WRITE_A_8:
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[f2bbe8c] | 116 | size = 1;
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| 117 | break;
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[56c167c] | 118 | case CMD_PIO_READ_16:
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| 119 | case CMD_PIO_WRITE_16:
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| 120 | case CMD_PIO_WRITE_A_16:
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[f2bbe8c] | 121 | size = 2;
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| 122 | break;
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[56c167c] | 123 | case CMD_PIO_READ_32:
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| 124 | case CMD_PIO_WRITE_32:
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| 125 | case CMD_PIO_WRITE_A_32:
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[f2bbe8c] | 126 | size = 4;
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[a996ae31] | 127 | break;
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| 128 | default:
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| 129 | /* Move onto the next command. */
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| 130 | continue;
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| 131 | }
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[a35b458] | 132 |
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[a996ae31] | 133 | addr = (uintptr_t) cmds[i].addr;
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[a35b458] | 134 |
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[56c167c] | 135 | size_t j;
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[a996ae31] | 136 | for (j = 0; j < rangecount; j++) {
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| 137 | /* Find the matching range. */
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[f2bbe8c] | 138 | if (!iswithin(pbase[j], ranges[j].size, addr, size))
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[a996ae31] | 139 | continue;
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[a35b458] | 140 |
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[a996ae31] | 141 | /* Switch the command to a kernel virtual address. */
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| 142 | addr -= pbase[j];
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| 143 | addr += ranges[j].base;
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[a35b458] | 144 |
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[a996ae31] | 145 | cmds[i].addr = (void *) addr;
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| 146 | break;
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[bd8c6537] | 147 | }
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[a35b458] | 148 |
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[bd8c6537] | 149 | if (j == rangecount) {
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| 150 | /*
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| 151 | * The address used in this command is outside of all
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| 152 | * defined ranges.
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| 153 | */
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| 154 | ranges_unmap(ranges, rangecount);
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| 155 | free(pbase);
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| 156 | return EINVAL;
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| 157 | }
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[a996ae31] | 158 | }
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[a35b458] | 159 |
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[a996ae31] | 160 | free(pbase);
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| 161 | return EOK;
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| 162 | }
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[162f919] | 163 |
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[a5d0143] | 164 | /** Statically check the top-half IRQ code
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[8486c07] | 165 | *
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[a5d0143] | 166 | * Check the top-half IRQ code for invalid or unsafe constructs.
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[8486c07] | 167 | *
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| 168 | */
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[b7fd2a0] | 169 | static errno_t code_check(irq_cmd_t *cmds, size_t cmdcount)
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[8486c07] | 170 | {
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| 171 | for (size_t i = 0; i < cmdcount; i++) {
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| 172 | /*
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| 173 | * Check for accepted ranges.
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| 174 | */
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| 175 | if (cmds[i].cmd >= CMD_LAST)
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| 176 | return EINVAL;
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[a35b458] | 177 |
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[8486c07] | 178 | if (cmds[i].srcarg >= IPC_CALL_LEN)
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| 179 | return EINVAL;
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[a35b458] | 180 |
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[8486c07] | 181 | if (cmds[i].dstarg >= IPC_CALL_LEN)
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| 182 | return EINVAL;
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[a35b458] | 183 |
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[8486c07] | 184 | switch (cmds[i].cmd) {
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| 185 | case CMD_PREDICATE:
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| 186 | /*
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| 187 | * Check for control flow overflow.
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| 188 | * Note that jumping just beyond the last
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| 189 | * command is a correct behaviour.
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| 190 | */
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| 191 | if (i + cmds[i].value > cmdcount)
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| 192 | return EINVAL;
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[a35b458] | 193 |
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[8486c07] | 194 | break;
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| 195 | default:
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| 196 | break;
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| 197 | }
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| 198 | }
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[a35b458] | 199 |
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[8486c07] | 200 | return EOK;
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| 201 | }
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| 202 |
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[a5d0143] | 203 | /** Free the top-half IRQ code.
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[8b243f2] | 204 | *
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[a5d0143] | 205 | * @param code Pointer to the top-half IRQ code.
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[da1bafb] | 206 | *
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[8b243f2] | 207 | */
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[162f919] | 208 | static void code_free(irq_code_t *code)
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| 209 | {
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| 210 | if (code) {
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[a996ae31] | 211 | ranges_unmap(code->ranges, code->rangecount);
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| 212 | free(code->ranges);
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[162f919] | 213 | free(code->cmds);
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| 214 | free(code);
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| 215 | }
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| 216 | }
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| 217 |
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[a5d0143] | 218 | /** Copy the top-half IRQ code from userspace into the kernel.
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[8b243f2] | 219 | *
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[a5d0143] | 220 | * @param ucode Userspace address of the top-half IRQ code.
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[da1bafb] | 221 | *
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[a5d0143] | 222 | * @return Kernel address of the copied IRQ code.
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[8b243f2] | 223 | *
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| 224 | */
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[5a5269d] | 225 | static irq_code_t *code_from_uspace(uspace_ptr_irq_code_t ucode)
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[162f919] | 226 | {
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[a996ae31] | 227 | irq_pio_range_t *ranges = NULL;
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| 228 | irq_cmd_t *cmds = NULL;
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[a35b458] | 229 |
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[11b285d] | 230 | irq_code_t *code = malloc(sizeof(*code));
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[7473807] | 231 | if (!code)
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| 232 | return NULL;
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[b7fd2a0] | 233 | errno_t rc = copy_from_uspace(code, ucode, sizeof(*code));
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[a996ae31] | 234 | if (rc != EOK)
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| 235 | goto error;
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[a35b458] | 236 |
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[a996ae31] | 237 | if ((code->rangecount > IRQ_MAX_RANGE_COUNT) ||
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| 238 | (code->cmdcount > IRQ_MAX_PROG_SIZE))
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| 239 | goto error;
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[a35b458] | 240 |
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[11b285d] | 241 | ranges = malloc(sizeof(code->ranges[0]) * code->rangecount);
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[7473807] | 242 | if (!ranges)
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| 243 | goto error;
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[5a5269d] | 244 | rc = copy_from_uspace(ranges, (uintptr_t) code->ranges,
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[a996ae31] | 245 | sizeof(code->ranges[0]) * code->rangecount);
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| 246 | if (rc != EOK)
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| 247 | goto error;
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[a35b458] | 248 |
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[11b285d] | 249 | cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount);
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[7473807] | 250 | if (!cmds)
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| 251 | goto error;
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[5a5269d] | 252 | rc = copy_from_uspace(cmds, (uintptr_t) code->cmds,
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[8b243f2] | 253 | sizeof(code->cmds[0]) * code->cmdcount);
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[a996ae31] | 254 | if (rc != EOK)
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| 255 | goto error;
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[a35b458] | 256 |
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[8486c07] | 257 | rc = code_check(cmds, code->cmdcount);
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| 258 | if (rc != EOK)
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| 259 | goto error;
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[a35b458] | 260 |
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[a996ae31] | 261 | rc = ranges_map_and_apply(ranges, code->rangecount, cmds,
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| 262 | code->cmdcount);
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| 263 | if (rc != EOK)
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| 264 | goto error;
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[a35b458] | 265 |
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[a996ae31] | 266 | code->ranges = ranges;
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| 267 | code->cmds = cmds;
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[a35b458] | 268 |
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[162f919] | 269 | return code;
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[a35b458] | 270 |
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[a996ae31] | 271 | error:
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| 272 | if (cmds)
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| 273 | free(cmds);
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[a35b458] | 274 |
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[a996ae31] | 275 | if (ranges)
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| 276 | free(ranges);
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[a35b458] | 277 |
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[a996ae31] | 278 | free(code);
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| 279 | return NULL;
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[162f919] | 280 | }
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| 281 |
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[c1f68b0] | 282 | static void irq_hash_out(irq_t *irq)
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| 283 | {
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| 284 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 285 | irq_spinlock_lock(&irq->lock, false);
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[a35b458] | 286 |
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[c1f68b0] | 287 | if (irq->notif_cfg.hashed_in) {
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| 288 | /* Remove the IRQ from the uspace IRQ hash table. */
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| 289 | hash_table_remove_item(&irq_uspace_hash_table, &irq->link);
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| 290 | irq->notif_cfg.hashed_in = false;
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| 291 | }
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| 292 |
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| 293 | irq_spinlock_unlock(&irq->lock, false);
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| 294 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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| 295 | }
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| 296 |
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[48bcf49] | 297 | static void irq_destroy(void *arg)
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| 298 | {
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| 299 | irq_t *irq = (irq_t *) arg;
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| 300 |
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[c1f68b0] | 301 | irq_hash_out(irq);
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| 302 |
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[48bcf49] | 303 | /* Free up the IRQ code and associated structures. */
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| 304 | code_free(irq->notif_cfg.code);
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[82d515e9] | 305 | slab_free(irq_cache, irq);
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[48bcf49] | 306 | }
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| 307 |
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[fc0de8c] | 308 | kobject_ops_t irq_kobject_ops = {
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[48bcf49] | 309 | .destroy = irq_destroy
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| 310 | };
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| 311 |
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[8820544] | 312 | /** Subscribe an answerbox as a receiving end for IRQ notifications.
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[2b017ba] | 313 | *
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[56c167c] | 314 | * @param box Receiving answerbox.
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| 315 | * @param inr IRQ number.
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[a5d0143] | 316 | * @param imethod Interface and method to be associated with the notification.
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| 317 | * @param ucode Uspace pointer to top-half IRQ code.
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[56c167c] | 318 | *
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[9233e9d] | 319 | * @param[out] uspace_handle Uspace pointer to IRQ capability handle
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| 320 | *
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| 321 | * @return Error code.
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[2b017ba] | 322 | *
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| 323 | */
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[b7fd2a0] | 324 | errno_t ipc_irq_subscribe(answerbox_t *box, inr_t inr, sysarg_t imethod,
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[5a5269d] | 325 | uspace_ptr_irq_code_t ucode, uspace_ptr_cap_irq_handle_t uspace_handle)
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[162f919] | 326 | {
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[78ffb70] | 327 | if ((inr < 0) || (inr > last_inr))
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| 328 | return ELIMIT;
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[a35b458] | 329 |
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[da1bafb] | 330 | irq_code_t *code;
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[162f919] | 331 | if (ucode) {
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| 332 | code = code_from_uspace(ucode);
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| 333 | if (!code)
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| 334 | return EBADMEM;
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[da1bafb] | 335 | } else
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[162f919] | 336 | code = NULL;
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[a35b458] | 337 |
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[cecb0789] | 338 | /*
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[e9d15d9] | 339 | * Allocate and populate the IRQ kernel object.
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[cecb0789] | 340 | */
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[09d01f2] | 341 | cap_handle_t handle;
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[b7fd2a0] | 342 | errno_t rc = cap_alloc(TASK, &handle);
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[09d01f2] | 343 | if (rc != EOK)
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| 344 | return rc;
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[a35b458] | 345 |
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[09d01f2] | 346 | rc = copy_to_uspace(uspace_handle, &handle, sizeof(cap_handle_t));
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[9233e9d] | 347 | if (rc != EOK) {
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| 348 | cap_free(TASK, handle);
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| 349 | return rc;
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| 350 | }
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| 351 |
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[82d515e9] | 352 | irq_t *irq = (irq_t *) slab_alloc(irq_cache, FRAME_ATOMIC);
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[63d8f43] | 353 | if (!irq) {
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| 354 | cap_free(TASK, handle);
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| 355 | return ENOMEM;
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| 356 | }
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[48bcf49] | 357 |
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[e394c196] | 358 | kobject_t *kobject = kobject_alloc(FRAME_ATOMIC);
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[48bcf49] | 359 | if (!kobject) {
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| 360 | cap_free(TASK, handle);
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[82d515e9] | 361 | slab_free(irq_cache, irq);
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[48bcf49] | 362 | return ENOMEM;
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| 363 | }
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[a35b458] | 364 |
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[cecb0789] | 365 | irq_initialize(irq);
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| 366 | irq->inr = inr;
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| 367 | irq->claim = ipc_irq_top_half_claim;
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[691eb52] | 368 | irq->handler = ipc_irq_top_half_handler;
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[4874c2d] | 369 | irq->notif_cfg.notify = true;
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[2b017ba] | 370 | irq->notif_cfg.answerbox = box;
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[228e490] | 371 | irq->notif_cfg.imethod = imethod;
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[2b017ba] | 372 | irq->notif_cfg.code = code;
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| 373 | irq->notif_cfg.counter = 0;
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[a35b458] | 374 |
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[cecb0789] | 375 | /*
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[9e87562] | 376 | * Insert the IRQ structure into the uspace IRQ hash table.
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[cecb0789] | 377 | */
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[da1bafb] | 378 | irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
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| 379 | irq_spinlock_lock(&irq->lock, false);
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[a35b458] | 380 |
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[48bcf49] | 381 | irq->notif_cfg.hashed_in = true;
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[82cbf8c6] | 382 | hash_table_insert(&irq_uspace_hash_table, &irq->link);
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[a35b458] | 383 |
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[da1bafb] | 384 | irq_spinlock_unlock(&irq->lock, false);
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| 385 | irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
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[9e87562] | 386 |
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[fc0de8c] | 387 | kobject_initialize(kobject, KOBJECT_TYPE_IRQ, irq);
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[48bcf49] | 388 | cap_publish(TASK, handle, kobject);
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[a35b458] | 389 |
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[9233e9d] | 390 | return EOK;
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[cecb0789] | 391 | }
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| 392 |
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[8820544] | 393 | /** Unsubscribe task from IRQ notification.
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[cecb0789] | 394 | *
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[3f74275] | 395 | * @param box Answerbox associated with the notification.
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| 396 | * @param handle IRQ capability handle.
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[56c167c] | 397 | *
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[cde999a] | 398 | * @return EOK on success or an error code.
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[56c167c] | 399 | *
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[cecb0789] | 400 | */
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[eadaeae8] | 401 | errno_t ipc_irq_unsubscribe(answerbox_t *box, cap_irq_handle_t handle)
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[cecb0789] | 402 | {
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[48bcf49] | 403 | kobject_t *kobj = cap_unpublish(TASK, handle, KOBJECT_TYPE_IRQ);
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| 404 | if (!kobj)
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[cecb0789] | 405 | return ENOENT;
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[a35b458] | 406 |
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[48bcf49] | 407 | assert(kobj->irq->notif_cfg.answerbox == box);
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| 408 |
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[c1f68b0] | 409 | irq_hash_out(kobj->irq);
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[48bcf49] | 410 |
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| 411 | kobject_put(kobj);
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[3f74275] | 412 | cap_free(TASK, handle);
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[a35b458] | 413 |
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[cecb0789] | 414 | return EOK;
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| 415 | }
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| 416 |
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[8b243f2] | 417 | /** Add a call to the proper answerbox queue.
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[2b017ba] | 418 | *
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[da1bafb] | 419 | * Assume irq->lock is locked and interrupts disabled.
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| 420 | *
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| 421 | * @param irq IRQ structure referencing the target answerbox.
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| 422 | * @param call IRQ notification call.
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[874621f] | 423 | *
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[2b017ba] | 424 | */
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| 425 | static void send_call(irq_t *irq, call_t *call)
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[874621f] | 426 | {
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[da1bafb] | 427 | irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
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[cfaa35a] | 428 | list_append(&call->ab_link, &irq->notif_cfg.answerbox->irq_notifs);
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[da1bafb] | 429 | irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
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[a35b458] | 430 |
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[111b9b9] | 431 | waitq_wake_one(&irq->notif_cfg.answerbox->wq);
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[874621f] | 432 | }
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| 433 |
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[a5d0143] | 434 | /** Apply the top-half IRQ code to find out whether to accept the IRQ or not.
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[874621f] | 435 | *
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[da1bafb] | 436 | * @param irq IRQ structure.
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| 437 | *
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[a5d0143] | 438 | * @return IRQ_ACCEPT if the interrupt is accepted by the IRQ code.
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| 439 | * @return IRQ_DECLINE if the interrupt is not accepted byt the IRQ code.
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[cecb0789] | 440 | *
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[874621f] | 441 | */
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[cecb0789] | 442 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
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[874621f] | 443 | {
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[cecb0789] | 444 | irq_code_t *code = irq->notif_cfg.code;
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[da1bafb] | 445 | uint32_t *scratch = irq->notif_cfg.scratch;
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[a35b458] | 446 |
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[cecb0789] | 447 | if (!irq->notif_cfg.notify)
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| 448 | return IRQ_DECLINE;
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[a35b458] | 449 |
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[cecb0789] | 450 | if (!code)
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| 451 | return IRQ_DECLINE;
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[a35b458] | 452 |
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[01e39cbe] | 453 | for (size_t i = 0; i < code->cmdcount; i++) {
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[da1bafb] | 454 | uintptr_t srcarg = code->cmds[i].srcarg;
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| 455 | uintptr_t dstarg = code->cmds[i].dstarg;
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[a35b458] | 456 |
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[cecb0789] | 457 | switch (code->cmds[i].cmd) {
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| 458 | case CMD_PIO_READ_8:
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[8486c07] | 459 | scratch[dstarg] =
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| 460 | pio_read_8((ioport8_t *) code->cmds[i].addr);
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[cecb0789] | 461 | break;
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| 462 | case CMD_PIO_READ_16:
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[8486c07] | 463 | scratch[dstarg] =
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| 464 | pio_read_16((ioport16_t *) code->cmds[i].addr);
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[cecb0789] | 465 | break;
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| 466 | case CMD_PIO_READ_32:
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[8486c07] | 467 | scratch[dstarg] =
|
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| 468 | pio_read_32((ioport32_t *) code->cmds[i].addr);
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[cecb0789] | 469 | break;
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| 470 | case CMD_PIO_WRITE_8:
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| 471 | pio_write_8((ioport8_t *) code->cmds[i].addr,
|
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| 472 | (uint8_t) code->cmds[i].value);
|
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| 473 | break;
|
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| 474 | case CMD_PIO_WRITE_16:
|
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| 475 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
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| 476 | (uint16_t) code->cmds[i].value);
|
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| 477 | break;
|
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| 478 | case CMD_PIO_WRITE_32:
|
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| 479 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
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| 480 | (uint32_t) code->cmds[i].value);
|
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| 481 | break;
|
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[9cdac5a] | 482 | case CMD_PIO_WRITE_A_8:
|
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[8486c07] | 483 | pio_write_8((ioport8_t *) code->cmds[i].addr,
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| 484 | (uint8_t) scratch[srcarg]);
|
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[9cdac5a] | 485 | break;
|
---|
| 486 | case CMD_PIO_WRITE_A_16:
|
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[8486c07] | 487 | pio_write_16((ioport16_t *) code->cmds[i].addr,
|
---|
| 488 | (uint16_t) scratch[srcarg]);
|
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[9cdac5a] | 489 | break;
|
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| 490 | case CMD_PIO_WRITE_A_32:
|
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[8486c07] | 491 | pio_write_32((ioport32_t *) code->cmds[i].addr,
|
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| 492 | (uint32_t) scratch[srcarg]);
|
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| 493 | break;
|
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| 494 | case CMD_LOAD:
|
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| 495 | scratch[dstarg] = code->cmds[i].value;
|
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[9cdac5a] | 496 | break;
|
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[8486c07] | 497 | case CMD_AND:
|
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| 498 | scratch[dstarg] = scratch[srcarg] &
|
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| 499 | code->cmds[i].value;
|
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[cecb0789] | 500 | break;
|
---|
| 501 | case CMD_PREDICATE:
|
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[8486c07] | 502 | if (scratch[srcarg] == 0)
|
---|
[cecb0789] | 503 | i += code->cmds[i].value;
|
---|
[a35b458] | 504 |
|
---|
[cecb0789] | 505 | break;
|
---|
| 506 | case CMD_ACCEPT:
|
---|
| 507 | return IRQ_ACCEPT;
|
---|
| 508 | case CMD_DECLINE:
|
---|
| 509 | default:
|
---|
| 510 | return IRQ_DECLINE;
|
---|
| 511 | }
|
---|
[874621f] | 512 | }
|
---|
[a35b458] | 513 |
|
---|
[cecb0789] | 514 | return IRQ_DECLINE;
|
---|
[874621f] | 515 | }
|
---|
| 516 |
|
---|
[7c3fb9b] | 517 | /** IRQ top-half handler.
|
---|
[162f919] | 518 | *
|
---|
[2b017ba] | 519 | * We expect interrupts to be disabled and the irq->lock already held.
|
---|
[8b243f2] | 520 | *
|
---|
[da1bafb] | 521 | * @param irq IRQ structure.
|
---|
| 522 | *
|
---|
[162f919] | 523 | */
|
---|
[cecb0789] | 524 | void ipc_irq_top_half_handler(irq_t *irq)
|
---|
[162f919] | 525 | {
|
---|
[63e27ef] | 526 | assert(irq);
|
---|
[a35b458] | 527 |
|
---|
[63e27ef] | 528 | assert(interrupts_disabled());
|
---|
| 529 | assert(irq_spinlock_locked(&irq->lock));
|
---|
[a35b458] | 530 |
|
---|
[2b017ba] | 531 | if (irq->notif_cfg.answerbox) {
|
---|
[90efa3b] | 532 | call_t *call = ipc_call_alloc();
|
---|
[cecb0789] | 533 | if (!call)
|
---|
[d8f7362] | 534 | return;
|
---|
[a35b458] | 535 |
|
---|
[162f919] | 536 | call->flags |= IPC_CALL_NOTIF;
|
---|
[43752b6] | 537 | /* Put a counter to the message */
|
---|
[0c1a5d8a] | 538 | call->priv = ++irq->notif_cfg.counter;
|
---|
[a35b458] | 539 |
|
---|
[43752b6] | 540 | /* Set up args */
|
---|
[fafb8e5] | 541 | ipc_set_imethod(&call->data, irq->notif_cfg.imethod);
|
---|
| 542 | ipc_set_arg1(&call->data, irq->notif_cfg.scratch[1]);
|
---|
| 543 | ipc_set_arg2(&call->data, irq->notif_cfg.scratch[2]);
|
---|
| 544 | ipc_set_arg3(&call->data, irq->notif_cfg.scratch[3]);
|
---|
| 545 | ipc_set_arg4(&call->data, irq->notif_cfg.scratch[4]);
|
---|
| 546 | ipc_set_arg5(&call->data, irq->notif_cfg.scratch[5]);
|
---|
[a35b458] | 547 |
|
---|
[2b017ba] | 548 | send_call(irq, call);
|
---|
[162f919] | 549 | }
|
---|
| 550 | }
|
---|
| 551 |
|
---|
[cecb0789] | 552 | /** Send notification message.
|
---|
[874621f] | 553 | *
|
---|
[da1bafb] | 554 | * @param irq IRQ structure.
|
---|
| 555 | * @param a1 Driver-specific payload argument.
|
---|
| 556 | * @param a2 Driver-specific payload argument.
|
---|
| 557 | * @param a3 Driver-specific payload argument.
|
---|
| 558 | * @param a4 Driver-specific payload argument.
|
---|
| 559 | * @param a5 Driver-specific payload argument.
|
---|
| 560 | *
|
---|
[162f919] | 561 | */
|
---|
[96b02eb9] | 562 | void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
|
---|
| 563 | sysarg_t a4, sysarg_t a5)
|
---|
[162f919] | 564 | {
|
---|
[da1bafb] | 565 | irq_spinlock_lock(&irq->lock, true);
|
---|
[a35b458] | 566 |
|
---|
[cecb0789] | 567 | if (irq->notif_cfg.answerbox) {
|
---|
[90efa3b] | 568 | call_t *call = ipc_call_alloc();
|
---|
[cecb0789] | 569 | if (!call) {
|
---|
[da1bafb] | 570 | irq_spinlock_unlock(&irq->lock, true);
|
---|
[cecb0789] | 571 | return;
|
---|
[b14e35f2] | 572 | }
|
---|
[a35b458] | 573 |
|
---|
[cecb0789] | 574 | call->flags |= IPC_CALL_NOTIF;
|
---|
| 575 | /* Put a counter to the message */
|
---|
| 576 | call->priv = ++irq->notif_cfg.counter;
|
---|
[a35b458] | 577 |
|
---|
[fafb8e5] | 578 | ipc_set_imethod(&call->data, irq->notif_cfg.imethod);
|
---|
| 579 | ipc_set_arg1(&call->data, a1);
|
---|
| 580 | ipc_set_arg2(&call->data, a2);
|
---|
| 581 | ipc_set_arg3(&call->data, a3);
|
---|
| 582 | ipc_set_arg4(&call->data, a4);
|
---|
| 583 | ipc_set_arg5(&call->data, a5);
|
---|
[a35b458] | 584 |
|
---|
[cecb0789] | 585 | send_call(irq, call);
|
---|
[b14e35f2] | 586 | }
|
---|
[a35b458] | 587 |
|
---|
[da1bafb] | 588 | irq_spinlock_unlock(&irq->lock, true);
|
---|
[162f919] | 589 | }
|
---|
[b45c443] | 590 |
|
---|
[cc73a8a1] | 591 | /** @}
|
---|
[b45c443] | 592 | */
|
---|