source: mainline/kernel/generic/src/ddi/irq.c@ 5b0ae4be

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5b0ae4be was 00eace3, checked in by Jakub Jermar <jakub@…>, 17 years ago

Fix UP builds.

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1/*
2 * Copyright (c) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup genericddi
30 * @{
31 */
32/**
33 * @file
34 * @brief IRQ dispatcher.
35 *
36 * This file provides means of connecting IRQs with particular
37 * devices and logic for dispatching interrupts to IRQ handlers
38 * defined by those devices.
39 *
40 * This code is designed to support:
41 * - multiple devices sharing single IRQ
42 * - multiple IRQs per single device
43 * - multiple instances of the same device
44 *
45 *
46 * Note about architectures.
47 *
48 * Some architectures has the term IRQ well defined. Examples
49 * of such architectures include amd64, ia32 and mips32. Some
50 * other architectures, such as sparc64, don't use the term
51 * at all. In those cases, we boldly step forward and define what
52 * an IRQ is.
53 *
54 * The implementation is generic enough and still allows the
55 * architectures to use the hardware layout effectively.
56 * For instance, on amd64 and ia32, where there is only 16
57 * IRQs, the irq_hash_table can be optimized to a one-dimensional
58 * array. Next, when it is known that the IRQ numbers (aka INR's)
59 * are unique, the claim functions can always return IRQ_ACCEPT.
60 *
61 *
62 * Note about the irq_hash_table.
63 *
64 * The hash table is configured to use two keys: inr and devno.
65 * However, the hash index is computed only from inr. Moreover,
66 * if devno is -1, the match is based on the return value of
67 * the claim() function instead of on devno.
68 */
69
70#include <ddi/irq.h>
71#include <adt/hash_table.h>
72#include <mm/slab.h>
73#include <arch/types.h>
74#include <synch/spinlock.h>
75#include <memstr.h>
76#include <arch.h>
77
78#define KEY_INR 0
79#define KEY_DEVNO 1
80
81/**
82 * Spinlock protecting the kernel IRQ hash table.
83 * This lock must be taken only when interrupts are disabled.
84 */
85SPINLOCK_INITIALIZE(irq_kernel_hash_table_lock);
86/** The kernel IRQ hash table. */
87static hash_table_t irq_kernel_hash_table;
88
89/**
90 * Spinlock protecting the uspace IRQ hash table.
91 * This lock must be taken only when interrupts are disabled.
92 */
93SPINLOCK_INITIALIZE(irq_uspace_hash_table_lock);
94/** The uspace IRQ hash table. */
95hash_table_t irq_uspace_hash_table;
96
97/**
98 * Hash table operations for cases when we know that
99 * there will be collisions between different keys.
100 */
101static index_t irq_ht_hash(unative_t *key);
102static bool irq_ht_compare(unative_t *key, count_t keys, link_t *item);
103
104static hash_table_operations_t irq_ht_ops = {
105 .hash = irq_ht_hash,
106 .compare = irq_ht_compare,
107 .remove_callback = NULL /* not used */
108};
109
110/**
111 * Hash table operations for cases when we know that
112 * there will be no collisions between different keys.
113 * However, there might be still collisions among
114 * elements with single key (sharing of one IRQ).
115 */
116static index_t irq_lin_hash(unative_t *key);
117static bool irq_lin_compare(unative_t *key, count_t keys, link_t *item);
118
119static hash_table_operations_t irq_lin_ops = {
120 .hash = irq_lin_hash,
121 .compare = irq_lin_compare,
122 .remove_callback = NULL /* not used */
123};
124
125/** Number of buckets in either of the hash tables. */
126static count_t buckets;
127
128/** Initialize IRQ subsystem.
129 *
130 * @param inrs Numbers of unique IRQ numbers or INRs.
131 * @param chains Number of chains in the hash table.
132 */
133void irq_init(count_t inrs, count_t chains)
134{
135 buckets = chains;
136 /*
137 * Be smart about the choice of the hash table operations.
138 * In cases in which inrs equals the requested number of
139 * chains (i.e. where there is no collision between
140 * different keys), we can use optimized set of operations.
141 */
142 if (inrs == chains) {
143 hash_table_create(&irq_uspace_hash_table, chains, 2,
144 &irq_lin_ops);
145 hash_table_create(&irq_kernel_hash_table, chains, 2,
146 &irq_lin_ops);
147 } else {
148 hash_table_create(&irq_uspace_hash_table, chains, 2,
149 &irq_ht_ops);
150 hash_table_create(&irq_kernel_hash_table, chains, 2,
151 &irq_ht_ops);
152 }
153}
154
155/** Initialize one IRQ structure.
156 *
157 * @param irq Pointer to the IRQ structure to be initialized.
158 *
159 */
160void irq_initialize(irq_t *irq)
161{
162 memsetb(irq, 0, sizeof(irq_t));
163 link_initialize(&irq->link);
164 spinlock_initialize(&irq->lock, "irq.lock");
165 link_initialize(&irq->notif_cfg.link);
166 irq->inr = -1;
167 irq->devno = -1;
168}
169
170/** Register IRQ for device.
171 *
172 * The irq structure must be filled with information
173 * about the interrupt source and with the claim()
174 * function pointer and handler() function pointer.
175 *
176 * @param irq IRQ structure belonging to a device.
177 * @return True on success, false on failure.
178 */
179void irq_register(irq_t *irq)
180{
181 ipl_t ipl;
182 unative_t key[] = {
183 (unative_t) irq->inr,
184 (unative_t) irq->devno
185 };
186
187 ipl = interrupts_disable();
188 spinlock_lock(&irq_kernel_hash_table_lock);
189 spinlock_lock(&irq->lock);
190 hash_table_insert(&irq_kernel_hash_table, key, &irq->link);
191 spinlock_unlock(&irq->lock);
192 spinlock_unlock(&irq_kernel_hash_table_lock);
193 interrupts_restore(ipl);
194}
195
196/** Dispatch the IRQ.
197 *
198 * We assume this function is only called from interrupt
199 * context (i.e. that interrupts are disabled prior to
200 * this call).
201 *
202 * This function attempts to lookup a fitting IRQ
203 * structure. In case of success, return with interrupts
204 * disabled and holding the respective structure.
205 *
206 * @param inr Interrupt number (aka inr or irq).
207 *
208 * @return IRQ structure of the respective device or NULL.
209 */
210irq_t *irq_dispatch_and_lock(inr_t inr)
211{
212 link_t *lnk;
213 unative_t key[] = {
214 (unative_t) inr,
215 (unative_t) -1 /* search will use claim() instead of devno */
216 };
217
218 /*
219 * Try uspace handlers first.
220 */
221 spinlock_lock(&irq_uspace_hash_table_lock);
222 lnk = hash_table_find(&irq_uspace_hash_table, key);
223 if (lnk) {
224 irq_t *irq;
225
226 irq = hash_table_get_instance(lnk, irq_t, link);
227 spinlock_unlock(&irq_uspace_hash_table_lock);
228 return irq;
229 }
230 spinlock_unlock(&irq_uspace_hash_table_lock);
231
232 /*
233 * Fallback to kernel handlers.
234 */
235 spinlock_lock(&irq_kernel_hash_table_lock);
236 lnk = hash_table_find(&irq_kernel_hash_table, key);
237 if (lnk) {
238 irq_t *irq;
239
240 irq = hash_table_get_instance(lnk, irq_t, link);
241 spinlock_unlock(&irq_kernel_hash_table_lock);
242 return irq;
243 }
244 spinlock_unlock(&irq_kernel_hash_table_lock);
245
246 return NULL;
247}
248
249/** Compute hash index for the key.
250 *
251 * This function computes hash index into
252 * the IRQ hash table for which there
253 * can be collisions between different
254 * INRs.
255 *
256 * The devno is not used to compute the hash.
257 *
258 * @param key The first of the keys is inr and the second is devno or -1.
259 *
260 * @return Index into the hash table.
261 */
262index_t irq_ht_hash(unative_t key[])
263{
264 inr_t inr = (inr_t) key[KEY_INR];
265 return inr % buckets;
266}
267
268/** Compare hash table element with a key.
269 *
270 * There are two things to note about this function.
271 * First, it is used for the more complex architecture setup
272 * in which there are way too many interrupt numbers (i.e. inr's)
273 * to arrange the hash table so that collisions occur only
274 * among same inrs of different devnos. So the explicit check
275 * for inr match must be done.
276 * Second, if devno is -1, the second key (i.e. devno) is not
277 * used for the match and the result of the claim() function
278 * is used instead.
279 *
280 * This function assumes interrupts are already disabled.
281 *
282 * @param key Keys (i.e. inr and devno).
283 * @param keys This is 2.
284 * @param item The item to compare the key with.
285 *
286 * @return True on match or false otherwise.
287 */
288bool irq_ht_compare(unative_t key[], count_t keys, link_t *item)
289{
290 irq_t *irq = hash_table_get_instance(item, irq_t, link);
291 inr_t inr = (inr_t) key[KEY_INR];
292 devno_t devno = (devno_t) key[KEY_DEVNO];
293
294 bool rv;
295
296 spinlock_lock(&irq->lock);
297 if (devno == -1) {
298 /* Invoked by irq_dispatch_and_lock(). */
299 rv = ((irq->inr == inr) &&
300 (irq->claim(irq) == IRQ_ACCEPT));
301 } else {
302 /* Invoked by irq_find_and_lock(). */
303 rv = ((irq->inr == inr) && (irq->devno == devno));
304 }
305
306 /* unlock only on non-match */
307 if (!rv)
308 spinlock_unlock(&irq->lock);
309
310 return rv;
311}
312
313/** Compute hash index for the key.
314 *
315 * This function computes hash index into
316 * the IRQ hash table for which there
317 * are no collisions between different
318 * INRs.
319 *
320 * @param key The first of the keys is inr and the second is devno or -1.
321 *
322 * @return Index into the hash table.
323 */
324index_t irq_lin_hash(unative_t key[])
325{
326 inr_t inr = (inr_t) key[KEY_INR];
327 return inr;
328}
329
330/** Compare hash table element with a key.
331 *
332 * There are two things to note about this function.
333 * First, it is used for the less complex architecture setup
334 * in which there are not too many interrupt numbers (i.e. inr's)
335 * to arrange the hash table so that collisions occur only
336 * among same inrs of different devnos. So the explicit check
337 * for inr match is not done.
338 * Second, if devno is -1, the second key (i.e. devno) is not
339 * used for the match and the result of the claim() function
340 * is used instead.
341 *
342 * This function assumes interrupts are already disabled.
343 *
344 * @param key Keys (i.e. inr and devno).
345 * @param keys This is 2.
346 * @param item The item to compare the key with.
347 *
348 * @return True on match or false otherwise.
349 */
350bool irq_lin_compare(unative_t key[], count_t keys, link_t *item)
351{
352 irq_t *irq = list_get_instance(item, irq_t, link);
353 devno_t devno = (devno_t) key[KEY_DEVNO];
354 bool rv;
355
356 spinlock_lock(&irq->lock);
357 if (devno == -1) {
358 /* Invoked by irq_dispatch_and_lock() */
359 rv = (irq->claim(irq) == IRQ_ACCEPT);
360 } else {
361 /* Invoked by irq_find_and_lock() */
362 rv = (irq->devno == devno);
363 }
364
365 /* unlock only on non-match */
366 if (!rv)
367 spinlock_unlock(&irq->lock);
368
369 return rv;
370}
371
372/** @}
373 */
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