source: mainline/kernel/generic/src/ddi/irq.c@ f25b2819

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f25b2819 was f542825, checked in by Jakub Jermar <jakub@…>, 17 years ago

Fix argument order.

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File size: 11.4 KB
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[0d107f31]1/*
[df4ed85]2 * Copyright (c) 2006 Jakub Jermar
[0d107f31]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[7dcf22a]29/** @addtogroup genericddi
[0d107f31]30 * @{
31 */
32/**
33 * @file
[e3890b3f]34 * @brief IRQ dispatcher.
[0d107f31]35 *
36 * This file provides means of connecting IRQs with particular
37 * devices and logic for dispatching interrupts to IRQ handlers
38 * defined by those devices.
39 *
40 * This code is designed to support:
41 * - multiple devices sharing single IRQ
[6cd9aa6]42 * - multiple IRQs per single device
43 * - multiple instances of the same device
[0d107f31]44 *
45 *
46 * Note about architectures.
47 *
48 * Some architectures has the term IRQ well defined. Examples
49 * of such architectures include amd64, ia32 and mips32. Some
50 * other architectures, such as sparc64, don't use the term
51 * at all. In those cases, we boldly step forward and define what
52 * an IRQ is.
53 *
54 * The implementation is generic enough and still allows the
55 * architectures to use the hardware layout effectively.
56 * For instance, on amd64 and ia32, where there is only 16
57 * IRQs, the irq_hash_table can be optimized to a one-dimensional
58 * array. Next, when it is known that the IRQ numbers (aka INR's)
59 * are unique, the claim functions can always return IRQ_ACCEPT.
[e3890b3f]60 *
61 *
62 * Note about the irq_hash_table.
63 *
64 * The hash table is configured to use two keys: inr and devno.
65 * However, the hash index is computed only from inr. Moreover,
66 * if devno is -1, the match is based on the return value of
67 * the claim() function instead of on devno.
[0d107f31]68 */
69
[7dcf22a]70#include <ddi/irq.h>
[0d107f31]71#include <adt/hash_table.h>
[cecb0789]72#include <mm/slab.h>
[0d107f31]73#include <arch/types.h>
74#include <synch/spinlock.h>
[691eb52]75#include <console/console.h>
[cecb0789]76#include <memstr.h>
[0d107f31]77#include <arch.h>
78
[e3890b3f]79#define KEY_INR 0
80#define KEY_DEVNO 1
81
[0d107f31]82/**
[cecb0789]83 * Spinlock protecting the kernel IRQ hash table.
[0d107f31]84 * This lock must be taken only when interrupts are disabled.
85 */
[00eace3]86SPINLOCK_INITIALIZE(irq_kernel_hash_table_lock);
[cecb0789]87/** The kernel IRQ hash table. */
88static hash_table_t irq_kernel_hash_table;
89
90/**
91 * Spinlock protecting the uspace IRQ hash table.
92 * This lock must be taken only when interrupts are disabled.
93 */
94SPINLOCK_INITIALIZE(irq_uspace_hash_table_lock);
95/** The uspace IRQ hash table. */
96hash_table_t irq_uspace_hash_table;
[0d107f31]97
98/**
99 * Hash table operations for cases when we know that
100 * there will be collisions between different keys.
101 */
102static index_t irq_ht_hash(unative_t *key);
103static bool irq_ht_compare(unative_t *key, count_t keys, link_t *item);
104
105static hash_table_operations_t irq_ht_ops = {
106 .hash = irq_ht_hash,
107 .compare = irq_ht_compare,
108 .remove_callback = NULL /* not used */
109};
110
111/**
112 * Hash table operations for cases when we know that
113 * there will be no collisions between different keys.
114 * However, there might be still collisions among
115 * elements with single key (sharing of one IRQ).
116 */
117static index_t irq_lin_hash(unative_t *key);
118static bool irq_lin_compare(unative_t *key, count_t keys, link_t *item);
119
120static hash_table_operations_t irq_lin_ops = {
121 .hash = irq_lin_hash,
122 .compare = irq_lin_compare,
123 .remove_callback = NULL /* not used */
124};
125
[cecb0789]126/** Number of buckets in either of the hash tables. */
127static count_t buckets;
128
[0d107f31]129/** Initialize IRQ subsystem.
130 *
131 * @param inrs Numbers of unique IRQ numbers or INRs.
132 * @param chains Number of chains in the hash table.
133 */
134void irq_init(count_t inrs, count_t chains)
135{
[cecb0789]136 buckets = chains;
[0d107f31]137 /*
138 * Be smart about the choice of the hash table operations.
139 * In cases in which inrs equals the requested number of
140 * chains (i.e. where there is no collision between
141 * different keys), we can use optimized set of operations.
142 */
[cecb0789]143 if (inrs == chains) {
144 hash_table_create(&irq_uspace_hash_table, chains, 2,
145 &irq_lin_ops);
146 hash_table_create(&irq_kernel_hash_table, chains, 2,
147 &irq_lin_ops);
148 } else {
149 hash_table_create(&irq_uspace_hash_table, chains, 2,
150 &irq_ht_ops);
151 hash_table_create(&irq_kernel_hash_table, chains, 2,
152 &irq_ht_ops);
153 }
[0d107f31]154}
155
156/** Initialize one IRQ structure.
157 *
158 * @param irq Pointer to the IRQ structure to be initialized.
159 *
160 */
161void irq_initialize(irq_t *irq)
162{
[f542825]163 memsetb(irq, sizeof(irq_t), 0);
[0d107f31]164 link_initialize(&irq->link);
[63530c62]165 spinlock_initialize(&irq->lock, "irq.lock");
[cecb0789]166 link_initialize(&irq->notif_cfg.link);
[0d107f31]167 irq->inr = -1;
168 irq->devno = -1;
169}
170
171/** Register IRQ for device.
172 *
173 * The irq structure must be filled with information
174 * about the interrupt source and with the claim()
[cecb0789]175 * function pointer and handler() function pointer.
[0d107f31]176 *
[cecb0789]177 * @param irq IRQ structure belonging to a device.
178 * @return True on success, false on failure.
[0d107f31]179 */
180void irq_register(irq_t *irq)
181{
182 ipl_t ipl;
[e3890b3f]183 unative_t key[] = {
184 (unative_t) irq->inr,
185 (unative_t) irq->devno
186 };
[0d107f31]187
188 ipl = interrupts_disable();
[00eace3]189 spinlock_lock(&irq_kernel_hash_table_lock);
[cecb0789]190 spinlock_lock(&irq->lock);
[00eace3]191 hash_table_insert(&irq_kernel_hash_table, key, &irq->link);
[cecb0789]192 spinlock_unlock(&irq->lock);
[00eace3]193 spinlock_unlock(&irq_kernel_hash_table_lock);
[0d107f31]194 interrupts_restore(ipl);
195}
196
[691eb52]197/** Search and lock the uspace IRQ hash table.
[e3890b3f]198 *
[0d107f31]199 */
[691eb52]200static irq_t *irq_dispatch_and_lock_uspace(inr_t inr)
[0d107f31]201{
202 link_t *lnk;
[e3890b3f]203 unative_t key[] = {
204 (unative_t) inr,
[691eb52]205 (unative_t) -1 /* search will use claim() instead of devno */
[e3890b3f]206 };
[0d107f31]207
[cecb0789]208 spinlock_lock(&irq_uspace_hash_table_lock);
209 lnk = hash_table_find(&irq_uspace_hash_table, key);
[e3890b3f]210 if (lnk) {
211 irq_t *irq;
212
213 irq = hash_table_get_instance(lnk, irq_t, link);
[cecb0789]214 spinlock_unlock(&irq_uspace_hash_table_lock);
[e3890b3f]215 return irq;
216 }
[cecb0789]217 spinlock_unlock(&irq_uspace_hash_table_lock);
[691eb52]218
219 return NULL;
220}
[e3890b3f]221
[691eb52]222/** Search and lock the kernel IRQ hash table.
223 *
224 */
225static irq_t *irq_dispatch_and_lock_kernel(inr_t inr)
226{
227 link_t *lnk;
228 unative_t key[] = {
229 (unative_t) inr,
230 (unative_t) -1 /* search will use claim() instead of devno */
231 };
232
[cecb0789]233 spinlock_lock(&irq_kernel_hash_table_lock);
234 lnk = hash_table_find(&irq_kernel_hash_table, key);
[0d107f31]235 if (lnk) {
236 irq_t *irq;
237
238 irq = hash_table_get_instance(lnk, irq_t, link);
[cecb0789]239 spinlock_unlock(&irq_kernel_hash_table_lock);
[0d107f31]240 return irq;
241 }
[cecb0789]242 spinlock_unlock(&irq_kernel_hash_table_lock);
[691eb52]243
244 return NULL;
245}
[0d107f31]246
[691eb52]247/** Dispatch the IRQ.
248 *
249 * We assume this function is only called from interrupt
250 * context (i.e. that interrupts are disabled prior to
251 * this call).
252 *
253 * This function attempts to lookup a fitting IRQ
254 * structure. In case of success, return with interrupts
255 * disabled and holding the respective structure.
256 *
257 * @param inr Interrupt number (aka inr or irq).
258 *
259 * @return IRQ structure of the respective device or NULL.
260 */
261irq_t *irq_dispatch_and_lock(inr_t inr)
262{
263 irq_t *irq;
264
265 /*
266 * If the kernel console is silenced,
267 * then try first the uspace handlers,
268 * eventually fall back to kernel handlers.
269 *
270 * If the kernel console is active,
271 * then do it the other way around.
272 */
273 if (silent) {
274 irq = irq_dispatch_and_lock_uspace(inr);
275 if (irq)
276 return irq;
277 return irq_dispatch_and_lock_kernel(inr);
278 }
279
280 irq = irq_dispatch_and_lock_kernel(inr);
281 if (irq)
282 return irq;
283 return irq_dispatch_and_lock_uspace(inr);
[0d107f31]284}
285
286/** Compute hash index for the key.
287 *
288 * This function computes hash index into
289 * the IRQ hash table for which there
290 * can be collisions between different
291 * INRs.
292 *
[e3890b3f]293 * The devno is not used to compute the hash.
294 *
295 * @param key The first of the keys is inr and the second is devno or -1.
[0d107f31]296 *
297 * @return Index into the hash table.
298 */
[e3890b3f]299index_t irq_ht_hash(unative_t key[])
[0d107f31]300{
[e3890b3f]301 inr_t inr = (inr_t) key[KEY_INR];
[cecb0789]302 return inr % buckets;
[0d107f31]303}
304
305/** Compare hash table element with a key.
306 *
[e3890b3f]307 * There are two things to note about this function.
308 * First, it is used for the more complex architecture setup
309 * in which there are way too many interrupt numbers (i.e. inr's)
310 * to arrange the hash table so that collisions occur only
311 * among same inrs of different devnos. So the explicit check
312 * for inr match must be done.
313 * Second, if devno is -1, the second key (i.e. devno) is not
314 * used for the match and the result of the claim() function
315 * is used instead.
[0d107f31]316 *
[e3890b3f]317 * This function assumes interrupts are already disabled.
318 *
319 * @param key Keys (i.e. inr and devno).
320 * @param keys This is 2.
[0d107f31]321 * @param item The item to compare the key with.
322 *
323 * @return True on match or false otherwise.
324 */
[e3890b3f]325bool irq_ht_compare(unative_t key[], count_t keys, link_t *item)
[0d107f31]326{
327 irq_t *irq = hash_table_get_instance(item, irq_t, link);
[e3890b3f]328 inr_t inr = (inr_t) key[KEY_INR];
329 devno_t devno = (devno_t) key[KEY_DEVNO];
330
[63530c62]331 bool rv;
[0d107f31]332
[63530c62]333 spinlock_lock(&irq->lock);
[e3890b3f]334 if (devno == -1) {
[f619ec11]335 /* Invoked by irq_dispatch_and_lock(). */
[6cd9aa6]336 rv = ((irq->inr == inr) &&
[cecb0789]337 (irq->claim(irq) == IRQ_ACCEPT));
[e3890b3f]338 } else {
[f619ec11]339 /* Invoked by irq_find_and_lock(). */
[e3890b3f]340 rv = ((irq->inr == inr) && (irq->devno == devno));
341 }
342
343 /* unlock only on non-match */
344 if (!rv)
345 spinlock_unlock(&irq->lock);
[63530c62]346
347 return rv;
[0d107f31]348}
349
350/** Compute hash index for the key.
351 *
352 * This function computes hash index into
353 * the IRQ hash table for which there
354 * are no collisions between different
355 * INRs.
356 *
[e3890b3f]357 * @param key The first of the keys is inr and the second is devno or -1.
[0d107f31]358 *
359 * @return Index into the hash table.
360 */
[e3890b3f]361index_t irq_lin_hash(unative_t key[])
[0d107f31]362{
[e3890b3f]363 inr_t inr = (inr_t) key[KEY_INR];
364 return inr;
[0d107f31]365}
366
367/** Compare hash table element with a key.
368 *
[e3890b3f]369 * There are two things to note about this function.
370 * First, it is used for the less complex architecture setup
371 * in which there are not too many interrupt numbers (i.e. inr's)
372 * to arrange the hash table so that collisions occur only
373 * among same inrs of different devnos. So the explicit check
374 * for inr match is not done.
375 * Second, if devno is -1, the second key (i.e. devno) is not
376 * used for the match and the result of the claim() function
377 * is used instead.
378 *
379 * This function assumes interrupts are already disabled.
[0d107f31]380 *
[e3890b3f]381 * @param key Keys (i.e. inr and devno).
382 * @param keys This is 2.
[0d107f31]383 * @param item The item to compare the key with.
384 *
385 * @return True on match or false otherwise.
386 */
[e3890b3f]387bool irq_lin_compare(unative_t key[], count_t keys, link_t *item)
[0d107f31]388{
389 irq_t *irq = list_get_instance(item, irq_t, link);
[e3890b3f]390 devno_t devno = (devno_t) key[KEY_DEVNO];
[63530c62]391 bool rv;
392
393 spinlock_lock(&irq->lock);
[e3890b3f]394 if (devno == -1) {
[f619ec11]395 /* Invoked by irq_dispatch_and_lock() */
[cecb0789]396 rv = (irq->claim(irq) == IRQ_ACCEPT);
[e3890b3f]397 } else {
[f619ec11]398 /* Invoked by irq_find_and_lock() */
[e3890b3f]399 rv = (irq->devno == devno);
400 }
401
402 /* unlock only on non-match */
403 if (!rv)
404 spinlock_unlock(&irq->lock);
[0d107f31]405
[63530c62]406 return rv;
[0d107f31]407}
408
409/** @}
410 */
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