[0d107f31] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[0d107f31] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[7dcf22a] | 29 | /** @addtogroup genericddi
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[0d107f31] | 30 | * @{
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| 31 | */
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| 32 | /**
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| 33 | * @file
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[e3890b3f] | 34 | * @brief IRQ dispatcher.
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[0d107f31] | 35 | *
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| 36 | * This file provides means of connecting IRQs with particular
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| 37 | * devices and logic for dispatching interrupts to IRQ handlers
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| 38 | * defined by those devices.
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| 39 | *
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| 40 | * This code is designed to support:
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| 41 | * - multiple devices sharing single IRQ
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| 42 | * - multiple IRQs per signle device
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| 43 | *
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| 44 | *
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| 45 | * Note about architectures.
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| 46 | *
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| 47 | * Some architectures has the term IRQ well defined. Examples
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| 48 | * of such architectures include amd64, ia32 and mips32. Some
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| 49 | * other architectures, such as sparc64, don't use the term
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| 50 | * at all. In those cases, we boldly step forward and define what
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| 51 | * an IRQ is.
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| 52 | *
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| 53 | * The implementation is generic enough and still allows the
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| 54 | * architectures to use the hardware layout effectively.
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| 55 | * For instance, on amd64 and ia32, where there is only 16
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| 56 | * IRQs, the irq_hash_table can be optimized to a one-dimensional
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| 57 | * array. Next, when it is known that the IRQ numbers (aka INR's)
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| 58 | * are unique, the claim functions can always return IRQ_ACCEPT.
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[e3890b3f] | 59 | *
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| 60 | *
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| 61 | * Note about the irq_hash_table.
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| 62 | *
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| 63 | * The hash table is configured to use two keys: inr and devno.
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| 64 | * However, the hash index is computed only from inr. Moreover,
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| 65 | * if devno is -1, the match is based on the return value of
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| 66 | * the claim() function instead of on devno.
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[0d107f31] | 67 | */
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| 68 |
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[7dcf22a] | 69 | #include <ddi/irq.h>
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[0d107f31] | 70 | #include <adt/hash_table.h>
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| 71 | #include <arch/types.h>
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| 72 | #include <synch/spinlock.h>
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| 73 | #include <arch.h>
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| 74 |
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[e3890b3f] | 75 | #define KEY_INR 0
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| 76 | #define KEY_DEVNO 1
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| 77 |
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[0d107f31] | 78 | /**
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| 79 | * Spinlock protecting the hash table.
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| 80 | * This lock must be taken only when interrupts are disabled.
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| 81 | */
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| 82 | SPINLOCK_INITIALIZE(irq_hash_table_lock);
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| 83 | static hash_table_t irq_hash_table;
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| 84 |
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| 85 | /**
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| 86 | * Hash table operations for cases when we know that
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| 87 | * there will be collisions between different keys.
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| 88 | */
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| 89 | static index_t irq_ht_hash(unative_t *key);
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| 90 | static bool irq_ht_compare(unative_t *key, count_t keys, link_t *item);
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| 91 |
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| 92 | static hash_table_operations_t irq_ht_ops = {
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| 93 | .hash = irq_ht_hash,
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| 94 | .compare = irq_ht_compare,
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| 95 | .remove_callback = NULL /* not used */
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| 96 | };
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| 97 |
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| 98 | /**
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| 99 | * Hash table operations for cases when we know that
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| 100 | * there will be no collisions between different keys.
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| 101 | * However, there might be still collisions among
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| 102 | * elements with single key (sharing of one IRQ).
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| 103 | */
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| 104 | static index_t irq_lin_hash(unative_t *key);
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| 105 | static bool irq_lin_compare(unative_t *key, count_t keys, link_t *item);
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| 106 |
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| 107 | static hash_table_operations_t irq_lin_ops = {
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| 108 | .hash = irq_lin_hash,
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| 109 | .compare = irq_lin_compare,
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| 110 | .remove_callback = NULL /* not used */
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| 111 | };
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| 112 |
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| 113 | /** Initialize IRQ subsystem.
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| 114 | *
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| 115 | * @param inrs Numbers of unique IRQ numbers or INRs.
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| 116 | * @param chains Number of chains in the hash table.
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| 117 | */
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| 118 | void irq_init(count_t inrs, count_t chains)
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| 119 | {
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| 120 | /*
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| 121 | * Be smart about the choice of the hash table operations.
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| 122 | * In cases in which inrs equals the requested number of
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| 123 | * chains (i.e. where there is no collision between
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| 124 | * different keys), we can use optimized set of operations.
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| 125 | */
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| 126 | if (inrs == chains)
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[e3890b3f] | 127 | hash_table_create(&irq_hash_table, chains, 2, &irq_lin_ops);
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[0d107f31] | 128 | else
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[e3890b3f] | 129 | hash_table_create(&irq_hash_table, chains, 2, &irq_ht_ops);
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[0d107f31] | 130 | }
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| 131 |
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| 132 | /** Initialize one IRQ structure.
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| 133 | *
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| 134 | * @param irq Pointer to the IRQ structure to be initialized.
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| 135 | *
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| 136 | */
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| 137 | void irq_initialize(irq_t *irq)
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| 138 | {
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| 139 | link_initialize(&irq->link);
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[63530c62] | 140 | spinlock_initialize(&irq->lock, "irq.lock");
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[0d107f31] | 141 | irq->inr = -1;
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| 142 | irq->devno = -1;
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[b513b3e] | 143 | irq->trigger = (irq_trigger_t) 0;
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[0d107f31] | 144 | irq->claim = NULL;
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| 145 | irq->handler = NULL;
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| 146 | irq->arg = NULL;
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[b14e35f2] | 147 | irq->notif_cfg.notify = false;
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[2b017ba] | 148 | irq->notif_cfg.answerbox = NULL;
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| 149 | irq->notif_cfg.code = NULL;
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| 150 | irq->notif_cfg.method = 0;
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| 151 | irq->notif_cfg.counter = 0;
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[b14e35f2] | 152 | link_initialize(&irq->notif_cfg.link);
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[0d107f31] | 153 | }
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| 154 |
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| 155 | /** Register IRQ for device.
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| 156 | *
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| 157 | * The irq structure must be filled with information
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| 158 | * about the interrupt source and with the claim()
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| 159 | * function pointer and irq_handler() function pointer.
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| 160 | *
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| 161 | * @param irq IRQ structure belonging to a device.
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| 162 | */
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| 163 | void irq_register(irq_t *irq)
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| 164 | {
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| 165 | ipl_t ipl;
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[e3890b3f] | 166 | unative_t key[] = {
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| 167 | (unative_t) irq->inr,
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| 168 | (unative_t) irq->devno
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| 169 | };
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[0d107f31] | 170 |
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| 171 | ipl = interrupts_disable();
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| 172 | spinlock_lock(&irq_hash_table_lock);
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[e3890b3f] | 173 | hash_table_insert(&irq_hash_table, key, &irq->link);
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[0d107f31] | 174 | spinlock_unlock(&irq_hash_table_lock);
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| 175 | interrupts_restore(ipl);
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| 176 | }
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| 177 |
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| 178 | /** Dispatch the IRQ.
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[e3890b3f] | 179 | *
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| 180 | * We assume this function is only called from interrupt
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| 181 | * context (i.e. that interrupts are disabled prior to
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| 182 | * this call).
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| 183 | *
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| 184 | * This function attempts to lookup a fitting IRQ
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| 185 | * structure. In case of success, return with interrupts
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| 186 | * disabled and holding the respective structure.
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[0d107f31] | 187 | *
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| 188 | * @param inr Interrupt number (aka inr or irq).
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| 189 | *
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| 190 | * @return IRQ structure of the respective device or NULL.
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| 191 | */
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[e3890b3f] | 192 | irq_t *irq_dispatch_and_lock(inr_t inr)
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[0d107f31] | 193 | {
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| 194 | link_t *lnk;
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[e3890b3f] | 195 | unative_t key[] = {
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| 196 | (unative_t) inr,
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| 197 | (unative_t) -1 /* search will use claim() instead of devno */
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| 198 | };
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[0d107f31] | 199 |
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| 200 | spinlock_lock(&irq_hash_table_lock);
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| 201 |
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[e3890b3f] | 202 | lnk = hash_table_find(&irq_hash_table, key);
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| 203 | if (lnk) {
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| 204 | irq_t *irq;
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| 205 |
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| 206 | irq = hash_table_get_instance(lnk, irq_t, link);
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| 207 |
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| 208 | spinlock_unlock(&irq_hash_table_lock);
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| 209 | return irq;
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| 210 | }
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| 211 |
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| 212 | spinlock_unlock(&irq_hash_table_lock);
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| 213 |
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| 214 | return NULL;
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| 215 | }
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| 216 |
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| 217 | /** Find the IRQ structure corresponding to inr and devno.
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| 218 | *
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| 219 | * This functions attempts to lookup the IRQ structure
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| 220 | * corresponding to its arguments. On success, this
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| 221 | * function returns with interrups disabled, holding
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| 222 | * the lock of the respective IRQ structure.
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| 223 | *
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| 224 | * This function assumes interrupts are already disabled.
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| 225 | *
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| 226 | * @param inr INR being looked up.
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| 227 | * @param devno Devno being looked up.
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| 228 | *
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| 229 | * @return Locked IRQ structure on success or NULL on failure.
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| 230 | */
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| 231 | irq_t *irq_find_and_lock(inr_t inr, devno_t devno)
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| 232 | {
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| 233 | link_t *lnk;
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| 234 | unative_t keys[] = {
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| 235 | (unative_t) inr,
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| 236 | (unative_t) devno
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| 237 | };
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| 238 |
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| 239 | spinlock_lock(&irq_hash_table_lock);
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| 240 |
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| 241 | lnk = hash_table_find(&irq_hash_table, keys);
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[0d107f31] | 242 | if (lnk) {
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| 243 | irq_t *irq;
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| 244 |
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| 245 | irq = hash_table_get_instance(lnk, irq_t, link);
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| 246 |
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| 247 | spinlock_unlock(&irq_hash_table_lock);
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| 248 | return irq;
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| 249 | }
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| 250 |
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| 251 | spinlock_unlock(&irq_hash_table_lock);
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| 252 |
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| 253 | return NULL;
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| 254 | }
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| 255 |
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| 256 | /** Compute hash index for the key.
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| 257 | *
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| 258 | * This function computes hash index into
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| 259 | * the IRQ hash table for which there
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| 260 | * can be collisions between different
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| 261 | * INRs.
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| 262 | *
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[e3890b3f] | 263 | * The devno is not used to compute the hash.
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| 264 | *
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| 265 | * @param key The first of the keys is inr and the second is devno or -1.
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[0d107f31] | 266 | *
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| 267 | * @return Index into the hash table.
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| 268 | */
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[e3890b3f] | 269 | index_t irq_ht_hash(unative_t key[])
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[0d107f31] | 270 | {
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[e3890b3f] | 271 | inr_t inr = (inr_t) key[KEY_INR];
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| 272 | return inr % irq_hash_table.entries;
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[0d107f31] | 273 | }
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| 274 |
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| 275 | /** Compare hash table element with a key.
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| 276 | *
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[e3890b3f] | 277 | * There are two things to note about this function.
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| 278 | * First, it is used for the more complex architecture setup
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| 279 | * in which there are way too many interrupt numbers (i.e. inr's)
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| 280 | * to arrange the hash table so that collisions occur only
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| 281 | * among same inrs of different devnos. So the explicit check
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| 282 | * for inr match must be done.
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| 283 | * Second, if devno is -1, the second key (i.e. devno) is not
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| 284 | * used for the match and the result of the claim() function
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| 285 | * is used instead.
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[0d107f31] | 286 | *
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[e3890b3f] | 287 | * This function assumes interrupts are already disabled.
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| 288 | *
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| 289 | * @param key Keys (i.e. inr and devno).
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| 290 | * @param keys This is 2.
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[0d107f31] | 291 | * @param item The item to compare the key with.
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| 292 | *
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| 293 | * @return True on match or false otherwise.
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| 294 | */
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[e3890b3f] | 295 | bool irq_ht_compare(unative_t key[], count_t keys, link_t *item)
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[0d107f31] | 296 | {
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| 297 | irq_t *irq = hash_table_get_instance(item, irq_t, link);
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[e3890b3f] | 298 | inr_t inr = (inr_t) key[KEY_INR];
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| 299 | devno_t devno = (devno_t) key[KEY_DEVNO];
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| 300 |
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[63530c62] | 301 | bool rv;
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[0d107f31] | 302 |
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[63530c62] | 303 | spinlock_lock(&irq->lock);
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[e3890b3f] | 304 | if (devno == -1) {
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[f619ec11] | 305 | /* Invoked by irq_dispatch_and_lock(). */
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[e3890b3f] | 306 | rv = ((irq->inr == inr) && (irq->claim() == IRQ_ACCEPT));
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| 307 | } else {
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[f619ec11] | 308 | /* Invoked by irq_find_and_lock(). */
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[e3890b3f] | 309 | rv = ((irq->inr == inr) && (irq->devno == devno));
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| 310 | }
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| 311 |
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| 312 | /* unlock only on non-match */
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| 313 | if (!rv)
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| 314 | spinlock_unlock(&irq->lock);
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[63530c62] | 315 |
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| 316 | return rv;
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[0d107f31] | 317 | }
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| 318 |
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| 319 | /** Compute hash index for the key.
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| 320 | *
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| 321 | * This function computes hash index into
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| 322 | * the IRQ hash table for which there
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| 323 | * are no collisions between different
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| 324 | * INRs.
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| 325 | *
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[e3890b3f] | 326 | * @param key The first of the keys is inr and the second is devno or -1.
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[0d107f31] | 327 | *
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| 328 | * @return Index into the hash table.
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| 329 | */
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[e3890b3f] | 330 | index_t irq_lin_hash(unative_t key[])
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[0d107f31] | 331 | {
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[e3890b3f] | 332 | inr_t inr = (inr_t) key[KEY_INR];
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| 333 | return inr;
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[0d107f31] | 334 | }
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| 335 |
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| 336 | /** Compare hash table element with a key.
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| 337 | *
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[e3890b3f] | 338 | * There are two things to note about this function.
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| 339 | * First, it is used for the less complex architecture setup
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| 340 | * in which there are not too many interrupt numbers (i.e. inr's)
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| 341 | * to arrange the hash table so that collisions occur only
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| 342 | * among same inrs of different devnos. So the explicit check
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| 343 | * for inr match is not done.
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| 344 | * Second, if devno is -1, the second key (i.e. devno) is not
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| 345 | * used for the match and the result of the claim() function
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| 346 | * is used instead.
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| 347 | *
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| 348 | * This function assumes interrupts are already disabled.
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[0d107f31] | 349 | *
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[e3890b3f] | 350 | * @param key Keys (i.e. inr and devno).
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| 351 | * @param keys This is 2.
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[0d107f31] | 352 | * @param item The item to compare the key with.
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| 353 | *
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| 354 | * @return True on match or false otherwise.
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| 355 | */
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[e3890b3f] | 356 | bool irq_lin_compare(unative_t key[], count_t keys, link_t *item)
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[0d107f31] | 357 | {
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| 358 | irq_t *irq = list_get_instance(item, irq_t, link);
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[e3890b3f] | 359 | devno_t devno = (devno_t) key[KEY_DEVNO];
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[63530c62] | 360 | bool rv;
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| 361 |
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| 362 | spinlock_lock(&irq->lock);
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[e3890b3f] | 363 | if (devno == -1) {
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[f619ec11] | 364 | /* Invoked by irq_dispatch_and_lock() */
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[e3890b3f] | 365 | rv = (irq->claim() == IRQ_ACCEPT);
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| 366 | } else {
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[f619ec11] | 367 | /* Invoked by irq_find_and_lock() */
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[e3890b3f] | 368 | rv = (irq->devno == devno);
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| 369 | }
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| 370 |
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| 371 | /* unlock only on non-match */
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| 372 | if (!rv)
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| 373 | spinlock_unlock(&irq->lock);
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[0d107f31] | 374 |
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[63530c62] | 375 | return rv;
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[0d107f31] | 376 | }
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| 377 |
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| 378 | /** @}
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| 379 | */
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