[0d107f31] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[0d107f31] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[174156fd] | 29 | /** @addtogroup kernel_generic_ddi
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[0d107f31] | 30 | * @{
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| 31 | */
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| 32 | /**
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| 33 | * @file
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[4d76cfc] | 34 | * @brief IRQ dispatcher
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[0d107f31] | 35 | *
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[4d76cfc] | 36 | * This file provides means of connecting IRQs with respective device drivers
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| 37 | * and logic for dispatching interrupts to IRQ handlers defined by those
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| 38 | * drivers.
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[0d107f31] | 39 | */
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| 40 |
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[7dcf22a] | 41 | #include <ddi/irq.h>
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[82cbf8c6] | 42 | #include <adt/hash.h>
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[0d107f31] | 43 | #include <adt/hash_table.h>
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[cecb0789] | 44 | #include <mm/slab.h>
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[d99c1d2] | 45 | #include <typedefs.h>
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[0d107f31] | 46 | #include <synch/spinlock.h>
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[691eb52] | 47 | #include <console/console.h>
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[3a2f8aa] | 48 | #include <interrupt.h>
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[b169619] | 49 | #include <memw.h>
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[0d107f31] | 50 | #include <arch.h>
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| 51 |
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[82d515e9] | 52 | slab_cache_t *irq_cache = NULL;
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[431c402] | 53 |
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[4d76cfc] | 54 | /** Spinlock protecting the kernel IRQ hash table
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[da1bafb] | 55 | *
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[0d107f31] | 56 | * This lock must be taken only when interrupts are disabled.
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[da1bafb] | 57 | *
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[0d107f31] | 58 | */
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[da1bafb] | 59 | IRQ_SPINLOCK_STATIC_INITIALIZE(irq_kernel_hash_table_lock);
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| 60 |
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[cecb0789] | 61 | /** The kernel IRQ hash table. */
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| 62 | static hash_table_t irq_kernel_hash_table;
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| 63 |
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[4d76cfc] | 64 | /** Spinlock protecting the uspace IRQ hash table
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[da1bafb] | 65 | *
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[cecb0789] | 66 | * This lock must be taken only when interrupts are disabled.
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[da1bafb] | 67 | *
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[cecb0789] | 68 | */
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[da1bafb] | 69 | IRQ_SPINLOCK_INITIALIZE(irq_uspace_hash_table_lock);
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| 70 |
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[4d76cfc] | 71 | /** The uspace IRQ hash table */
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[cecb0789] | 72 | hash_table_t irq_uspace_hash_table;
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[0d107f31] | 73 |
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[82cbf8c6] | 74 | static size_t irq_ht_hash(const ht_link_t *);
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[5e801dc] | 75 | static size_t irq_ht_key_hash(const void *);
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[82cbf8c6] | 76 | static bool irq_ht_equal(const ht_link_t *, const ht_link_t *);
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[0db0df2] | 77 | static bool irq_ht_key_equal(const void *, size_t, const ht_link_t *);
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[0d107f31] | 78 |
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[61eb2ce2] | 79 | static const hash_table_ops_t irq_ht_ops = {
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[0d107f31] | 80 | .hash = irq_ht_hash,
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[82cbf8c6] | 81 | .key_hash = irq_ht_key_hash,
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| 82 | .equal = irq_ht_equal,
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| 83 | .key_equal = irq_ht_key_equal
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[0d107f31] | 84 | };
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| 85 |
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[4d76cfc] | 86 | /** Last valid INR */
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[78ffb70] | 87 | inr_t last_inr = 0;
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| 88 |
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[4d76cfc] | 89 | /** Initialize IRQ subsystem
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[0d107f31] | 90 | *
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[4d76cfc] | 91 | * @param inrs Numbers of unique IRQ numbers or INRs.
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| 92 | * @param chains Number of buckets in the hash table.
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[da1bafb] | 93 | *
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[0d107f31] | 94 | */
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[98000fb] | 95 | void irq_init(size_t inrs, size_t chains)
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[0d107f31] | 96 | {
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[78ffb70] | 97 | last_inr = inrs - 1;
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| 98 |
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[82d515e9] | 99 | irq_cache = slab_cache_create("irq_t", sizeof(irq_t), 0, NULL, NULL,
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[431c402] | 100 | FRAME_ATOMIC);
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[82d515e9] | 101 | assert(irq_cache);
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[431c402] | 102 |
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[82cbf8c6] | 103 | hash_table_create(&irq_uspace_hash_table, chains, 0, &irq_ht_ops);
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| 104 | hash_table_create(&irq_kernel_hash_table, chains, 0, &irq_ht_ops);
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[0d107f31] | 105 | }
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| 106 |
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[4d76cfc] | 107 | /** Initialize one IRQ structure
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[0d107f31] | 108 | *
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[4d76cfc] | 109 | * @param irq Pointer to the IRQ structure to be initialized.
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[0d107f31] | 110 | *
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| 111 | */
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| 112 | void irq_initialize(irq_t *irq)
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| 113 | {
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[f542825] | 114 | memsetb(irq, sizeof(irq_t), 0);
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[da1bafb] | 115 | irq_spinlock_initialize(&irq->lock, "irq.lock");
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[0d107f31] | 116 | irq->inr = -1;
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[a35b458] | 117 |
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[3a2f8aa] | 118 | irq_initialize_arch(irq);
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[0d107f31] | 119 | }
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| 120 |
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[4d76cfc] | 121 | /** Register IRQ for device
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[0d107f31] | 122 | *
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[ee50130] | 123 | * The irq structure must be filled with information about the interrupt source
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| 124 | * and with the claim() function pointer and handler() function pointer.
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[0d107f31] | 125 | *
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[4d76cfc] | 126 | * @param irq IRQ structure belonging to a device.
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[da1bafb] | 127 | *
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[0d107f31] | 128 | */
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| 129 | void irq_register(irq_t *irq)
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| 130 | {
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[da1bafb] | 131 | irq_spinlock_lock(&irq_kernel_hash_table_lock, true);
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| 132 | irq_spinlock_lock(&irq->lock, false);
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[82cbf8c6] | 133 | hash_table_insert(&irq_kernel_hash_table, &irq->link);
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[da1bafb] | 134 | irq_spinlock_unlock(&irq->lock, false);
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| 135 | irq_spinlock_unlock(&irq_kernel_hash_table_lock, true);
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[0d107f31] | 136 | }
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| 137 |
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[82cbf8c6] | 138 | /** Search and lock an IRQ hash table */
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| 139 | static irq_t *
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| 140 | irq_dispatch_and_lock_table(hash_table_t *h, irq_spinlock_t *l, inr_t inr)
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[691eb52] | 141 | {
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[82cbf8c6] | 142 | irq_spinlock_lock(l, false);
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[0db0df2] | 143 |
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| 144 | hash_table_foreach(h, &inr, link, irq_t, irq) {
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[82cbf8c6] | 145 | irq_spinlock_lock(&irq->lock, false);
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| 146 | if (irq->claim(irq) == IRQ_ACCEPT) {
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| 147 | /* leave irq locked */
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| 148 | irq_spinlock_unlock(l, false);
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| 149 | return irq;
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| 150 | }
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| 151 | irq_spinlock_unlock(&irq->lock, false);
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[0d107f31] | 152 | }
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[0db0df2] | 153 |
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[82cbf8c6] | 154 | irq_spinlock_unlock(l, false);
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[a35b458] | 155 |
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[691eb52] | 156 | return NULL;
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| 157 | }
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[0d107f31] | 158 |
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[4d76cfc] | 159 | /** Dispatch the IRQ
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[691eb52] | 160 | *
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[ee50130] | 161 | * We assume this function is only called from interrupt context (i.e. that
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| 162 | * interrupts are disabled prior to this call).
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[691eb52] | 163 | *
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[ee50130] | 164 | * This function attempts to lookup a fitting IRQ structure. In case of success,
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| 165 | * return with interrupts disabled and holding the respective structure.
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[691eb52] | 166 | *
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[4d76cfc] | 167 | * @param inr Interrupt number (aka inr or irq).
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[691eb52] | 168 | *
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[ee50130] | 169 | * @return IRQ structure of the respective device
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| 170 | * @return NULL if no IRQ structure found
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[da1bafb] | 171 | *
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[691eb52] | 172 | */
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| 173 | irq_t *irq_dispatch_and_lock(inr_t inr)
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| 174 | {
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| 175 | /*
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[ee50130] | 176 | * If the kernel console override is on, then try first the kernel
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| 177 | * handlers and eventually fall back to uspace handlers.
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[691eb52] | 178 | *
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[ee50130] | 179 | * In the usual case the uspace handlers have precedence.
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[691eb52] | 180 | */
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[a35b458] | 181 |
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[b366a6f4] | 182 | if (console_override) {
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[82cbf8c6] | 183 | irq_t *irq = irq_dispatch_and_lock_table(&irq_kernel_hash_table,
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| 184 | &irq_kernel_hash_table_lock, inr);
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[691eb52] | 185 | if (irq)
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| 186 | return irq;
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[a35b458] | 187 |
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[82cbf8c6] | 188 | return irq_dispatch_and_lock_table(&irq_uspace_hash_table,
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| 189 | &irq_uspace_hash_table_lock, inr);
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[691eb52] | 190 | }
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[a35b458] | 191 |
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[82cbf8c6] | 192 | irq_t *irq = irq_dispatch_and_lock_table(&irq_uspace_hash_table,
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| 193 | &irq_uspace_hash_table_lock, inr);
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[691eb52] | 194 | if (irq)
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| 195 | return irq;
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[a35b458] | 196 |
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[82cbf8c6] | 197 | return irq_dispatch_and_lock_table(&irq_kernel_hash_table,
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| 198 | &irq_kernel_hash_table_lock, inr);
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[0d107f31] | 199 | }
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| 200 |
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[82cbf8c6] | 201 | /** Return the hash of the key stored in the item. */
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| 202 | size_t irq_ht_hash(const ht_link_t *item)
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[0d107f31] | 203 | {
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[82cbf8c6] | 204 | irq_t *irq = hash_table_get_inst(item, irq_t, link);
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| 205 | return hash_mix(irq->inr);
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[0d107f31] | 206 | }
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| 207 |
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[82cbf8c6] | 208 | /** Return the hash of the key. */
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[5e801dc] | 209 | size_t irq_ht_key_hash(const void *key)
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[0d107f31] | 210 | {
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[5e801dc] | 211 | const inr_t *inr = key;
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[82cbf8c6] | 212 | return hash_mix(*inr);
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[0d107f31] | 213 | }
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| 214 |
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[82cbf8c6] | 215 | /** Return true if the items have the same lookup key. */
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| 216 | bool irq_ht_equal(const ht_link_t *item1, const ht_link_t *item2)
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[2845930] | 217 | {
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[82cbf8c6] | 218 | irq_t *irq1 = hash_table_get_inst(item1, irq_t, link);
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| 219 | irq_t *irq2 = hash_table_get_inst(item2, irq_t, link);
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| 220 | return irq1->inr == irq2->inr;
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| 221 | }
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| 222 |
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| 223 | /** Return true if the key is equal to the item's lookup key. */
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[0db0df2] | 224 | bool irq_ht_key_equal(const void *key, size_t hash, const ht_link_t *item)
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[82cbf8c6] | 225 | {
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[5e801dc] | 226 | const inr_t *inr = key;
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[82cbf8c6] | 227 | irq_t *irq = hash_table_get_inst(item, irq_t, link);
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| 228 | return irq->inr == *inr;
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[2845930] | 229 | }
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| 230 |
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[0d107f31] | 231 | /** @}
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| 232 | */
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