source: mainline/kernel/generic/src/cpu/cpu.c@ 3bacee1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3bacee1 was 3bacee1, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Make ccheck-fix again and commit more good files.

  • Property mode set to 100644
File size: 3.2 KB
Line 
1 /*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup generic
30 * @{
31 */
32
33/**
34 * @file
35 * @brief CPU subsystem initialization and listing.
36 */
37
38#include <cpu.h>
39#include <arch.h>
40#include <arch/cpu.h>
41#include <mm/slab.h>
42#include <mm/page.h>
43#include <mm/frame.h>
44#include <typedefs.h>
45#include <config.h>
46#include <panic.h>
47#include <mem.h>
48#include <adt/list.h>
49#include <print.h>
50#include <sysinfo/sysinfo.h>
51#include <arch/cycle.h>
52#include <synch/rcu.h>
53
54cpu_t *cpus;
55
56/** Initialize CPUs
57 *
58 * Initialize kernel CPUs support.
59 *
60 */
61void cpu_init(void)
62{
63#ifdef CONFIG_SMP
64 if (config.cpu_active == 1) {
65#endif /* CONFIG_SMP */
66
67 cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count,
68 FRAME_ATOMIC);
69 if (!cpus)
70 panic("Cannot allocate CPU structures.");
71
72 /* Initialize everything */
73 memsetb(cpus, sizeof(cpu_t) * config.cpu_count, 0);
74
75 size_t i;
76 for (i = 0; i < config.cpu_count; i++) {
77 uintptr_t stack_phys = frame_alloc(STACK_FRAMES,
78 FRAME_LOWMEM | FRAME_ATOMIC, STACK_SIZE - 1);
79 if (!stack_phys)
80 panic("Cannot allocate CPU stack.");
81
82 cpus[i].stack = (uint8_t *) PA2KA(stack_phys);
83 cpus[i].id = i;
84
85 irq_spinlock_initialize(&cpus[i].lock, "cpus[].lock");
86
87 for (unsigned int j = 0; j < RQ_COUNT; j++) {
88 irq_spinlock_initialize(&cpus[i].rq[j].lock, "cpus[].rq[].lock");
89 list_initialize(&cpus[i].rq[j].rq);
90 }
91 }
92
93#ifdef CONFIG_SMP
94 }
95#endif /* CONFIG_SMP */
96
97 CPU = &cpus[config.cpu_active - 1];
98
99 CPU->active = true;
100 CPU->tlb_active = true;
101
102 CPU->idle = false;
103 CPU->last_cycle = get_cycle();
104 CPU->idle_cycles = 0;
105 CPU->busy_cycles = 0;
106
107 cpu_identify();
108 cpu_arch_init();
109 rcu_cpu_init();
110}
111
112/** List all processors. */
113void cpu_list(void)
114{
115 unsigned int i;
116
117 for (i = 0; i < config.cpu_count; i++) {
118 if (cpus[i].active)
119 cpu_print_report(&cpus[i]);
120 else
121 printf("cpu%u: not active\n", i);
122 }
123}
124
125/** @}
126 */
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