source: mainline/kernel/generic/src/cpu/cpu.c@ 40257f5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 40257f5 was 0f269c2, checked in by Martin Decky <martin@…>, 17 years ago

proper printf formatting & coding style

  • Property mode set to 100644
File size: 2.9 KB
RevLine 
[b45c443]1 /*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[1bb2e7a]29/** @addtogroup generic
[b45c443]30 * @{
31 */
32
[cf26ba9]33/**
[b45c443]34 * @file
[cf26ba9]35 * @brief CPU subsystem initialization and listing.
36 */
37
[f761f1eb]38#include <cpu.h>
[43114c5]39#include <arch.h>
[f761f1eb]40#include <arch/cpu.h>
[085d973]41#include <mm/slab.h>
[f761f1eb]42#include <mm/page.h>
43#include <mm/frame.h>
44#include <arch/types.h>
45#include <config.h>
46#include <panic.h>
47#include <memstr.h>
[5c9a08b]48#include <adt/list.h>
[0132630]49#include <print.h>
[f761f1eb]50
51cpu_t *cpus;
52
[673104e]53/** Initialize CPUs
54 *
55 * Initialize kernel CPUs support.
56 *
57 */
[f761f1eb]58void cpu_init(void) {
[8ecb3067]59 unsigned int i, j;
[f761f1eb]60
[4e33b6b]61#ifdef CONFIG_SMP
[f761f1eb]62 if (config.cpu_active == 1) {
[4e33b6b]63#endif /* CONFIG_SMP */
[bb68433]64 cpus = (cpu_t *) malloc(sizeof(cpu_t) * config.cpu_count,
65 FRAME_ATOMIC);
[f761f1eb]66 if (!cpus)
67 panic("malloc/cpus");
68
69 /* initialize everything */
[7f1c620]70 memsetb((uintptr_t) cpus, sizeof(cpu_t) * config.cpu_count, 0);
[76cec1e]71
[8ecb3067]72 for (i = 0; i < config.cpu_count; i++) {
[7f1c620]73 cpus[i].stack = (uint8_t *) frame_alloc(STACK_FRAMES, FRAME_KA | FRAME_ATOMIC);
[f761f1eb]74
75 cpus[i].id = i;
76
[dc747e3]77 spinlock_initialize(&cpus[i].lock, "cpu_t.lock");
78
[f761f1eb]79 for (j = 0; j < RQ_COUNT; j++) {
[dc747e3]80 spinlock_initialize(&cpus[i].rq[j].lock, "rq_t.lock");
[f761f1eb]81 list_initialize(&cpus[i].rq[j].rq_head);
82 }
83 }
84
[4e33b6b]85#ifdef CONFIG_SMP
[f761f1eb]86 }
[4e33b6b]87#endif /* CONFIG_SMP */
[7ce9284]88
89 CPU = &cpus[config.cpu_active-1];
[f761f1eb]90
[ad36bd6]91 CPU->active = 1;
[434f700]92 CPU->tlb_active = 1;
[ad36bd6]93
[f761f1eb]94 cpu_identify();
95 cpu_arch_init();
96}
[0132630]97
98/** List all processors. */
99void cpu_list(void)
100{
[8ecb3067]101 unsigned int i;
[0132630]102
103 for (i = 0; i < config.cpu_count; i++) {
104 if (cpus[i].active)
105 cpu_print_report(&cpus[i]);
106 else
[0f269c2]107 printf("cpu%u: not active\n", i);
[0132630]108 }
109}
[b45c443]110
[9a5b556]111/** @}
[b45c443]112 */
113
Note: See TracBrowser for help on using the repository browser.