[23684b7] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[23684b7] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[174156fd] | 29 | /** @addtogroup kernel_generic
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[06e1e95] | 35 | #ifndef KERN_ATOMIC_H_
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| 36 | #define KERN_ATOMIC_H_
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[23684b7] | 37 |
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[4621d23] | 38 | #include <stdbool.h>
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[d99c1d2] | 39 | #include <typedefs.h>
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[4621d23] | 40 | #include <stdatomic.h>
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[23684b7] | 41 |
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[efed95a3] | 42 | /*
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| 43 | * Shorthand for relaxed atomic read/write, something that's needed to formally
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| 44 | * avoid undefined behavior in cases where we need to read a variable in
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| 45 | * different threads and we don't particularly care about ordering
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| 46 | * (e.g. statistic printouts). This is most likely translated into the same
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| 47 | * assembly instructions as regular read/writes.
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| 48 | */
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| 49 | #define atomic_set_unordered(var, val) atomic_store_explicit((var), (val), memory_order_relaxed)
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| 50 | #define atomic_get_unordered(var) atomic_load_explicit((var), memory_order_relaxed)
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| 51 |
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[c53e813] | 52 | #define atomic_predec(val) \
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| 53 | (atomic_fetch_sub((val), 1) - 1)
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[4621d23] | 54 |
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[c53e813] | 55 | #define atomic_preinc(val) \
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| 56 | (atomic_fetch_add((val), 1) + 1)
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[4621d23] | 57 |
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[c53e813] | 58 | #define atomic_postdec(val) \
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| 59 | atomic_fetch_sub((val), 1)
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[4621d23] | 60 |
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[c53e813] | 61 | #define atomic_postinc(val) \
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| 62 | atomic_fetch_add((val), 1)
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[4621d23] | 63 |
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[c53e813] | 64 | #define atomic_dec(val) \
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| 65 | ((void) atomic_fetch_sub(val, 1))
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[4621d23] | 66 |
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[c53e813] | 67 | #define atomic_inc(val) \
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| 68 | ((void) atomic_fetch_add(val, 1))
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[618d02a] | 69 |
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| 70 | #define local_atomic_exchange(var_addr, new_val) \
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[8591b31] | 71 | atomic_exchange_explicit( \
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| 72 | (_Atomic typeof(*(var_addr)) *) (var_addr), \
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| 73 | (new_val), memory_order_relaxed)
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[618d02a] | 74 |
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[b2ec5cf] | 75 | #if __64_BITS__
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| 76 |
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| 77 | typedef struct {
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| 78 | atomic_uint_fast64_t value;
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| 79 | } atomic_time_stat_t;
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| 80 |
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| 81 | #define ATOMIC_TIME_INITIALIZER() (atomic_time_stat_t) {}
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| 82 |
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| 83 | static inline void atomic_time_increment(atomic_time_stat_t *time, int a)
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| 84 | {
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| 85 | /*
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| 86 | * We require increments to be synchronized with each other, so we
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| 87 | * can use ordinary reads and writes instead of a more expensive atomic
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| 88 | * read-modify-write operations.
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| 89 | */
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| 90 | uint64_t v = atomic_load_explicit(&time->value, memory_order_relaxed);
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| 91 | atomic_store_explicit(&time->value, v + a, memory_order_relaxed);
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| 92 | }
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| 93 |
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| 94 | static inline uint64_t atomic_time_read(atomic_time_stat_t *time)
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| 95 | {
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| 96 | return atomic_load_explicit(&time->value, memory_order_relaxed);
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| 97 | }
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| 98 |
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| 99 | #else
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| 100 |
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| 101 | /**
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| 102 | * A monotonically increasing 64b time statistic.
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| 103 | * Increments must be synchronized with each other (or limited to a single
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| 104 | * thread/CPU), but reads can be performed from any thread.
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| 105 | *
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| 106 | */
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| 107 | typedef struct {
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| 108 | uint64_t true_value;
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| 109 | atomic_uint_fast32_t high1;
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| 110 | atomic_uint_fast32_t high2;
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| 111 | atomic_uint_fast32_t low;
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| 112 | } atomic_time_stat_t;
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| 113 |
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| 114 | #define ATOMIC_TIME_INITIALIZER() (atomic_time_stat_t) {}
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| 115 |
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| 116 | static inline void atomic_time_increment(atomic_time_stat_t *time, int a)
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| 117 | {
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| 118 | /*
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| 119 | * On 32b architectures, we can't rely on 64b memory reads/writes being
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| 120 | * architecturally atomic, but we also don't want to pay the cost of
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| 121 | * emulating atomic reads/writes, so instead we split value in half
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| 122 | * and perform some ordering magic to make sure readers always get
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| 123 | * consistent value.
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| 124 | */
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| 125 |
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| 126 | /* true_value is only used by the writer, so this need not be atomic. */
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| 127 | uint64_t val = time->true_value;
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| 128 | uint32_t old_high = val >> 32;
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| 129 | val += a;
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| 130 | uint32_t new_high = val >> 32;
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| 131 | time->true_value = val;
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| 132 |
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| 133 | /* Tell GCC that the first branch is far more likely than the second. */
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| 134 | if (__builtin_expect(old_high == new_high, 1)) {
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| 135 | /* If the high half didn't change, we need not bother with barriers. */
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| 136 | atomic_store_explicit(&time->low, (uint32_t) val, memory_order_relaxed);
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| 137 | } else {
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| 138 | /*
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| 139 | * If both halves changed, extra ordering is necessary.
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| 140 | * The idea is that if reader reads high1 and high2 with the same value,
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| 141 | * it is guaranteed that they read the correct low half for that value.
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| 142 | *
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| 143 | * This is the same sequence that is used by userspace to read clock.
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| 144 | */
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| 145 | atomic_store_explicit(&time->high1, new_high, memory_order_relaxed);
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| 146 | atomic_store_explicit(&time->low, (uint32_t) val, memory_order_release);
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| 147 | atomic_store_explicit(&time->high2, new_high, memory_order_release);
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| 148 | }
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| 149 | }
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| 150 |
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| 151 | static inline uint64_t atomic_time_read(atomic_time_stat_t *time)
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| 152 | {
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| 153 | uint32_t high2 = atomic_load_explicit(&time->high2, memory_order_acquire);
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| 154 | uint32_t low = atomic_load_explicit(&time->low, memory_order_acquire);
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| 155 | uint32_t high1 = atomic_load_explicit(&time->high1, memory_order_relaxed);
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| 156 |
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| 157 | if (high1 != high2)
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| 158 | low = 0;
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| 159 |
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| 160 | /* If the values differ, high1 is always the newer value. */
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| 161 | return (uint64_t) high1 << 32 | (uint64_t) low;
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| 162 | }
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| 163 |
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| 164 | #endif /* __64_BITS__ */
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| 165 |
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[23684b7] | 166 | #endif
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[b45c443] | 167 |
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[42d3be3] | 168 | /** @}
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[b45c443] | 169 | */
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