source: mainline/kernel/genarch/src/ofw/ebus.c@ 7d60cf5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7d60cf5 was 8d2760f, checked in by Jakub Jermar <jakub@…>, 17 years ago

Add additional members to the irq_t structure so that an interrupt-driven driver
does not need to know how to clear the level interrupt. The z8530 was modified
in this way and is much more generic. The ns16550 driver has also been modified,
but awaits testing. The sparc64 interrupt mapping and dispatch code is now using
the new info and calls the clear-interrupt-routine itself.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1/*
2 * Copyright (c) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ofw
30 * @{
31 */
32/**
33 * @file
34 * @brief EBUS 'reg' and 'ranges' properties handling.
35 *
36 */
37
38#include <genarch/ofw/ofw_tree.h>
39#include <arch/memstr.h>
40#include <arch/trap/interrupt.h>
41#include <func.h>
42#include <panic.h>
43#include <debug.h>
44#include <macros.h>
45
46/** Apply EBUS ranges to EBUS register. */
47bool
48ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
49{
50 ofw_tree_property_t *prop;
51 ofw_ebus_range_t *range;
52 count_t ranges;
53
54 prop = ofw_tree_getprop(node, "ranges");
55 if (!prop)
56 return false;
57
58 ranges = prop->size / sizeof(ofw_ebus_range_t);
59 range = prop->value;
60
61 unsigned int i;
62
63 for (i = 0; i < ranges; i++) {
64 if (reg->space != range[i].child_space)
65 continue;
66 if (overlaps(reg->addr, reg->size, range[i].child_base,
67 range[i].size)) {
68 ofw_pci_reg_t pci_reg;
69
70 pci_reg.space = range[i].parent_space;
71 pci_reg.addr = range[i].parent_base +
72 (reg->addr - range[i].child_base);
73 pci_reg.size = reg->size;
74
75 return ofw_pci_apply_ranges(node->parent, &pci_reg, pa);
76 }
77 }
78
79 return false;
80}
81
82bool
83ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg,
84 uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
85{
86 ofw_tree_property_t *prop;
87 ofw_tree_node_t *controller;
88
89 prop = ofw_tree_getprop(node, "interrupt-map");
90 if (!prop || !prop->value)
91 return false;
92
93 ofw_ebus_intr_map_t *intr_map = prop->value;
94 count_t count = prop->size / sizeof(ofw_ebus_intr_map_t);
95
96 ASSERT(count);
97
98 prop = ofw_tree_getprop(node, "interrupt-map-mask");
99 if (!prop || !prop->value)
100 return false;
101
102 ofw_ebus_intr_mask_t *intr_mask = prop->value;
103
104 ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t));
105
106 uint32_t space = reg->space & intr_mask->space_mask;
107 uint32_t addr = reg->addr & intr_mask->addr_mask;
108 uint32_t intr = interrupt & intr_mask->intr_mask;
109
110 unsigned int i;
111 for (i = 0; i < count; i++) {
112 if ((intr_map[i].space == space) &&
113 (intr_map[i].addr == addr) && (intr_map[i].intr == intr))
114 goto found;
115 }
116 return false;
117
118found:
119 /*
120 * We found the device that functions as an interrupt controller
121 * for the interrupt. We also found partial mapping from interrupt to
122 * INO.
123 */
124
125 controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"),
126 intr_map[i].controller_handle);
127 if (!controller)
128 return false;
129
130 if (strcmp(ofw_tree_node_name(controller), "pci") != 0) {
131 /*
132 * This is not a PCI node.
133 */
134 return false;
135 }
136
137 /*
138 * Let the PCI do the next step in mapping the interrupt.
139 */
140 if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino,
141 inr, cir, cir_arg))
142 return false;
143
144 return true;
145}
146
147/** @}
148 */
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