source: mainline/kernel/genarch/src/mm/page_pt.c@ f1fc83a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f1fc83a was 8f80c77, checked in by Jakub Jermar <jakub@…>, 15 years ago

Lock/interrupt assertions in the code are self-documenting. No need to have that information duplicated in the comments.

  • Property mode set to 100644
File size: 8.0 KB
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1/*
2 * Copyright (c) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup genarchmm
30 * @{
31 */
32
33/**
34 * @file
35 * @brief Virtual Address Translation for hierarchical 4-level page tables.
36 */
37
38#include <genarch/mm/page_pt.h>
39#include <mm/page.h>
40#include <mm/frame.h>
41#include <mm/as.h>
42#include <arch/mm/page.h>
43#include <arch/mm/as.h>
44#include <typedefs.h>
45#include <arch/asm.h>
46#include <memstr.h>
47
48static void pt_mapping_insert(as_t *, uintptr_t, uintptr_t, unsigned int);
49static void pt_mapping_remove(as_t *, uintptr_t);
50static pte_t *pt_mapping_find(as_t *, uintptr_t);
51
52page_mapping_operations_t pt_mapping_operations = {
53 .mapping_insert = pt_mapping_insert,
54 .mapping_remove = pt_mapping_remove,
55 .mapping_find = pt_mapping_find
56};
57
58/** Map page to frame using hierarchical page tables.
59 *
60 * Map virtual address page to physical address frame
61 * using flags.
62 *
63 * @param as Address space to wich page belongs.
64 * @param page Virtual address of the page to be mapped.
65 * @param frame Physical address of memory frame to which the mapping is done.
66 * @param flags Flags to be used for mapping.
67 *
68 */
69void pt_mapping_insert(as_t *as, uintptr_t page, uintptr_t frame,
70 unsigned int flags)
71{
72 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
73
74 ASSERT(interrupts_disabled());
75 ASSERT(page_table_locked(as));
76
77 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
78 pte_t *newpt = (pte_t *) frame_alloc(PTL1_SIZE, FRAME_KA);
79 memsetb(newpt, FRAME_SIZE << PTL1_SIZE, 0);
80 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
81 SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
82 }
83
84 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
85
86 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
87 pte_t *newpt = (pte_t *) frame_alloc(PTL2_SIZE, FRAME_KA);
88 memsetb(newpt, FRAME_SIZE << PTL2_SIZE, 0);
89 SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
90 SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
91 }
92
93 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
94
95 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
96 pte_t *newpt = (pte_t *) frame_alloc(PTL3_SIZE, FRAME_KA);
97 memsetb(newpt, FRAME_SIZE << PTL3_SIZE, 0);
98 SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
99 SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
100 }
101
102 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
103
104 SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
105 SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
106}
107
108/** Remove mapping of page from hierarchical page tables.
109 *
110 * Remove any mapping of page within address space as.
111 * TLB shootdown should follow in order to make effects of
112 * this call visible.
113 *
114 * Empty page tables except PTL0 are freed.
115 *
116 * @param as Address space to wich page belongs.
117 * @param page Virtual address of the page to be demapped.
118 *
119 */
120void pt_mapping_remove(as_t *as, uintptr_t page)
121{
122 ASSERT(interrupts_disabled());
123 ASSERT(page_table_locked(as));
124
125 /*
126 * First, remove the mapping, if it exists.
127 *
128 */
129
130 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
131 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
132 return;
133
134 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
135 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
136 return;
137
138 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
139 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
140 return;
141
142 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
143
144 /* Destroy the mapping. Setting to PAGE_NOT_PRESENT is not sufficient. */
145 memsetb(&ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
146
147 /*
148 * Second, free all empty tables along the way from PTL3 down to PTL0.
149 *
150 */
151
152 /* Check PTL3 */
153 bool empty = true;
154
155 unsigned int i;
156 for (i = 0; i < PTL3_ENTRIES; i++) {
157 if (PTE_VALID(&ptl3[i])) {
158 empty = false;
159 break;
160 }
161 }
162
163 if (empty) {
164 /*
165 * PTL3 is empty.
166 * Release the frame and remove PTL3 pointer from preceding table.
167 *
168 */
169 frame_free(KA2PA((uintptr_t) ptl3));
170#if (PTL2_ENTRIES != 0)
171 memsetb(&ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
172#elif (PTL1_ENTRIES != 0)
173 memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
174#else
175 memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
176#endif
177 } else {
178 /*
179 * PTL3 is not empty.
180 * Therefore, there must be a path from PTL0 to PTL3 and
181 * thus nothing to free in higher levels.
182 *
183 */
184 return;
185 }
186
187 /* Check PTL2, empty is still true */
188#if (PTL2_ENTRIES != 0)
189 for (i = 0; i < PTL2_ENTRIES; i++) {
190 if (PTE_VALID(&ptl2[i])) {
191 empty = false;
192 break;
193 }
194 }
195
196 if (empty) {
197 /*
198 * PTL2 is empty.
199 * Release the frame and remove PTL2 pointer from preceding table.
200 *
201 */
202 frame_free(KA2PA((uintptr_t) ptl2));
203#if (PTL1_ENTRIES != 0)
204 memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
205#else
206 memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
207#endif
208 } else {
209 /*
210 * PTL2 is not empty.
211 * Therefore, there must be a path from PTL0 to PTL2 and
212 * thus nothing to free in higher levels.
213 *
214 */
215 return;
216 }
217#endif /* PTL2_ENTRIES != 0 */
218
219 /* check PTL1, empty is still true */
220#if (PTL1_ENTRIES != 0)
221 for (i = 0; i < PTL1_ENTRIES; i++) {
222 if (PTE_VALID(&ptl1[i])) {
223 empty = false;
224 break;
225 }
226 }
227
228 if (empty) {
229 /*
230 * PTL1 is empty.
231 * Release the frame and remove PTL1 pointer from preceding table.
232 *
233 */
234 frame_free(KA2PA((uintptr_t) ptl1));
235 memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
236 }
237#endif /* PTL1_ENTRIES != 0 */
238}
239
240/** Find mapping for virtual page in hierarchical page tables.
241 *
242 * Find mapping for virtual page.
243 *
244 * @param as Address space to which page belongs.
245 * @param page Virtual page.
246 *
247 * @return NULL if there is no such mapping; entry from PTL3 describing
248 * the mapping otherwise.
249 *
250 */
251pte_t *pt_mapping_find(as_t *as, uintptr_t page)
252{
253 ASSERT(interrupts_disabled());
254 ASSERT(page_table_locked(as));
255
256 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
257 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
258 return NULL;
259
260 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
261 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
262 return NULL;
263
264 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
265 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
266 return NULL;
267
268 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
269
270 return &ptl3[PTL3_INDEX(page)];
271}
272
273/** @}
274 */
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