1 | /*
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2 | * Copyright (c) 2006 Jakub Jermar
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup genarchmm
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30 | * @{
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31 | */
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32 |
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33 | /**
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34 | * @file
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35 | * @brief Virtual Address Translation for hierarchical 4-level page tables.
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36 | */
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37 |
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38 | #include <assert.h>
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39 | #include <genarch/mm/page_pt.h>
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40 | #include <mm/page.h>
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41 | #include <mm/frame.h>
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42 | #include <mm/km.h>
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43 | #include <mm/as.h>
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44 | #include <arch/mm/page.h>
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45 | #include <arch/mm/as.h>
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46 | #include <barrier.h>
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47 | #include <typedefs.h>
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48 | #include <arch/asm.h>
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49 | #include <mem.h>
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50 | #include <align.h>
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51 | #include <macros.h>
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52 | #include <bitops.h>
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53 |
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54 | static void pt_mapping_insert(as_t *, uintptr_t, uintptr_t, unsigned int);
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55 | static void pt_mapping_remove(as_t *, uintptr_t);
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56 | static bool pt_mapping_find(as_t *, uintptr_t, bool, pte_t *pte);
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57 | static void pt_mapping_update(as_t *, uintptr_t, bool, pte_t *pte);
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58 | static void pt_mapping_make_global(uintptr_t, size_t);
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59 |
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60 | page_mapping_operations_t pt_mapping_operations = {
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61 | .mapping_insert = pt_mapping_insert,
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62 | .mapping_remove = pt_mapping_remove,
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63 | .mapping_find = pt_mapping_find,
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64 | .mapping_update = pt_mapping_update,
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65 | .mapping_make_global = pt_mapping_make_global
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66 | };
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67 |
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68 | /** Map page to frame using hierarchical page tables.
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69 | *
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70 | * Map virtual address page to physical address frame
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71 | * using flags.
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72 | *
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73 | * @param as Address space to wich page belongs.
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74 | * @param page Virtual address of the page to be mapped.
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75 | * @param frame Physical address of memory frame to which the mapping is done.
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76 | * @param flags Flags to be used for mapping.
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77 | *
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78 | */
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79 | void pt_mapping_insert(as_t *as, uintptr_t page, uintptr_t frame,
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80 | unsigned int flags)
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81 | {
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82 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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83 |
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84 | assert(page_table_locked(as));
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85 |
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86 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
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87 | pte_t *newpt = (pte_t *)
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88 | PA2KA(frame_alloc(PTL1_FRAMES, FRAME_LOWMEM, PTL1_SIZE - 1));
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89 | memsetb(newpt, PTL1_SIZE, 0);
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90 | SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
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91 | SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page),
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92 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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93 | PAGE_WRITE);
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94 | /*
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95 | * Make sure that a concurrent hardware page table walk or
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96 | * pt_mapping_find() will see the new PTL1 only after it is
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97 | * fully initialized.
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98 | */
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99 | write_barrier();
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100 | SET_PTL1_PRESENT(ptl0, PTL0_INDEX(page));
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101 | }
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102 |
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103 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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104 |
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105 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
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106 | pte_t *newpt = (pte_t *)
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107 | PA2KA(frame_alloc(PTL2_FRAMES, FRAME_LOWMEM, PTL2_SIZE - 1));
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108 | memsetb(newpt, PTL2_SIZE, 0);
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109 | SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
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110 | SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page),
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111 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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112 | PAGE_WRITE);
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113 | /*
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114 | * Make the new PTL2 visible only after it is fully initialized.
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115 | */
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116 | write_barrier();
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117 | SET_PTL2_PRESENT(ptl1, PTL1_INDEX(page));
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118 | }
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119 |
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120 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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121 |
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122 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
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123 | pte_t *newpt = (pte_t *)
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124 | PA2KA(frame_alloc(PTL3_FRAMES, FRAME_LOWMEM, PTL2_SIZE - 1));
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125 | memsetb(newpt, PTL2_SIZE, 0);
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126 | SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
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127 | SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page),
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128 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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129 | PAGE_WRITE);
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130 | /*
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131 | * Make the new PTL3 visible only after it is fully initialized.
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132 | */
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133 | write_barrier();
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134 | SET_PTL3_PRESENT(ptl2, PTL2_INDEX(page));
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135 | }
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136 |
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137 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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138 |
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139 | SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
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140 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags | PAGE_NOT_PRESENT);
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141 | /*
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142 | * Make the new mapping visible only after it is fully initialized.
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143 | */
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144 | write_barrier();
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145 | SET_FRAME_PRESENT(ptl3, PTL3_INDEX(page));
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146 | }
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147 |
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148 | /** Remove mapping of page from hierarchical page tables.
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149 | *
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150 | * Remove any mapping of page within address space as.
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151 | * TLB shootdown should follow in order to make effects of
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152 | * this call visible.
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153 | *
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154 | * Empty page tables except PTL0 are freed.
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155 | *
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156 | * @param as Address space to wich page belongs.
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157 | * @param page Virtual address of the page to be demapped.
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158 | *
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159 | */
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160 | void pt_mapping_remove(as_t *as, uintptr_t page)
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161 | {
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162 | assert(page_table_locked(as));
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163 |
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164 | /*
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165 | * First, remove the mapping, if it exists.
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166 | */
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167 |
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168 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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169 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
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170 | return;
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171 |
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172 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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173 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
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174 | return;
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175 |
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176 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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177 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
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178 | return;
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179 |
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180 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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181 |
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182 | /*
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183 | * Destroy the mapping.
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184 | * Setting to PAGE_NOT_PRESENT is not sufficient.
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185 | * But we need SET_FRAME for possible PT coherence maintenance.
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186 | * At least on ARM.
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187 | */
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188 | //TODO: Fix this inconsistency
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189 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), PAGE_NOT_PRESENT);
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190 | memsetb(&ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
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191 |
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192 | /*
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193 | * Second, free all empty tables along the way from PTL3 down to PTL0
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194 | * except those needed for sharing the kernel non-identity mappings.
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195 | */
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196 |
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197 | /* Check PTL3 */
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198 | bool empty = true;
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199 |
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200 | unsigned int i;
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201 | for (i = 0; i < PTL3_ENTRIES; i++) {
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202 | if (PTE_VALID(&ptl3[i])) {
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203 | empty = false;
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204 | break;
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205 | }
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206 | }
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207 |
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208 | if (empty) {
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209 | /*
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210 | * PTL3 is empty.
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211 | * Release the frame and remove PTL3 pointer from the parent
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212 | * table.
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213 | */
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214 | #if (PTL2_ENTRIES != 0)
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215 | memsetb(&ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
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216 | #elif (PTL1_ENTRIES != 0)
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217 | memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
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218 | #else
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219 | if (km_is_non_identity(page))
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220 | return;
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221 |
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222 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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223 | #endif
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224 | frame_free(KA2PA((uintptr_t) ptl3), PTL3_FRAMES);
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225 | } else {
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226 | /*
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227 | * PTL3 is not empty.
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228 | * Therefore, there must be a path from PTL0 to PTL3 and
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229 | * thus nothing to free in higher levels.
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230 | *
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231 | */
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232 | return;
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233 | }
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234 |
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235 | /* Check PTL2, empty is still true */
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236 | #if (PTL2_ENTRIES != 0)
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237 | for (i = 0; i < PTL2_ENTRIES; i++) {
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238 | if (PTE_VALID(&ptl2[i])) {
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239 | empty = false;
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240 | break;
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241 | }
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242 | }
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243 |
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244 | if (empty) {
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245 | /*
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246 | * PTL2 is empty.
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247 | * Release the frame and remove PTL2 pointer from the parent
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248 | * table.
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249 | */
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250 | #if (PTL1_ENTRIES != 0)
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251 | memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
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252 | #else
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253 | if (km_is_non_identity(page))
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254 | return;
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255 |
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256 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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257 | #endif
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258 | frame_free(KA2PA((uintptr_t) ptl2), PTL2_FRAMES);
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259 | } else {
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260 | /*
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261 | * PTL2 is not empty.
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262 | * Therefore, there must be a path from PTL0 to PTL2 and
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263 | * thus nothing to free in higher levels.
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264 | *
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265 | */
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266 | return;
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267 | }
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268 | #endif /* PTL2_ENTRIES != 0 */
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269 |
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270 | /* check PTL1, empty is still true */
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271 | #if (PTL1_ENTRIES != 0)
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272 | for (i = 0; i < PTL1_ENTRIES; i++) {
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273 | if (PTE_VALID(&ptl1[i])) {
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274 | empty = false;
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275 | break;
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276 | }
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277 | }
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278 |
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279 | if (empty) {
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280 | /*
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281 | * PTL1 is empty.
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282 | * Release the frame and remove PTL1 pointer from the parent
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283 | * table.
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284 | */
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285 | if (km_is_non_identity(page))
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286 | return;
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287 |
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288 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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289 | frame_free(KA2PA((uintptr_t) ptl1), PTL1_FRAMES);
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290 | }
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291 | #endif /* PTL1_ENTRIES != 0 */
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292 | }
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293 |
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294 | static pte_t *pt_mapping_find_internal(as_t *as, uintptr_t page, bool nolock)
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295 | {
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296 | assert(nolock || page_table_locked(as));
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297 |
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298 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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299 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
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300 | return NULL;
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301 |
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302 | read_barrier();
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303 |
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304 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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305 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
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306 | return NULL;
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307 |
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308 | #if (PTL1_ENTRIES != 0)
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309 | /*
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310 | * Always read ptl2 only after we are sure it is present.
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311 | */
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312 | read_barrier();
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313 | #endif
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314 |
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315 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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316 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
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317 | return NULL;
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318 |
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319 | #if (PTL2_ENTRIES != 0)
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320 | /*
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321 | * Always read ptl3 only after we are sure it is present.
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322 | */
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323 | read_barrier();
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324 | #endif
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325 |
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326 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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327 |
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328 | return &ptl3[PTL3_INDEX(page)];
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329 | }
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330 |
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331 | /** Find mapping for virtual page in hierarchical page tables.
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332 | *
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333 | * @param as Address space to which page belongs.
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334 | * @param page Virtual page.
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335 | * @param nolock True if the page tables need not be locked.
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336 | * @param[out] pte Structure that will receive a copy of the found PTE.
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337 | *
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338 | * @return True if the mapping was found, false otherwise.
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339 | */
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340 | bool pt_mapping_find(as_t *as, uintptr_t page, bool nolock, pte_t *pte)
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341 | {
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342 | pte_t *t = pt_mapping_find_internal(as, page, nolock);
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343 | if (t)
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344 | *pte = *t;
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345 | return t != NULL;
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346 | }
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347 |
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348 | /** Update mapping for virtual page in hierarchical page tables.
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349 | *
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350 | * @param as Address space to which page belongs.
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351 | * @param page Virtual page.
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352 | * @param nolock True if the page tables need not be locked.
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353 | * @param[in] pte New PTE.
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354 | */
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355 | void pt_mapping_update(as_t *as, uintptr_t page, bool nolock, pte_t *pte)
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356 | {
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357 | pte_t *t = pt_mapping_find_internal(as, page, nolock);
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358 | if (!t)
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359 | panic("Updating non-existent PTE");
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360 |
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361 | assert(PTE_VALID(t) == PTE_VALID(pte));
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362 | assert(PTE_PRESENT(t) == PTE_PRESENT(pte));
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363 | assert(PTE_GET_FRAME(t) == PTE_GET_FRAME(pte));
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364 | assert(PTE_WRITABLE(t) == PTE_WRITABLE(pte));
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365 | assert(PTE_EXECUTABLE(t) == PTE_EXECUTABLE(pte));
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366 |
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367 | *t = *pte;
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368 | }
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369 |
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370 | /** Return the size of the region mapped by a single PTL0 entry.
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371 | *
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372 | * @return Size of the region mapped by a single PTL0 entry.
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373 | */
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374 | static uintptr_t ptl0_step_get(void)
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375 | {
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376 | size_t va_bits;
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377 |
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378 | va_bits = fnzb(PTL0_ENTRIES) + fnzb(PTL1_ENTRIES) + fnzb(PTL2_ENTRIES) +
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379 | fnzb(PTL3_ENTRIES) + PAGE_WIDTH;
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380 |
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381 | return 1UL << (va_bits - fnzb(PTL0_ENTRIES));
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382 | }
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383 |
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384 | /** Make the mappings in the given range global accross all address spaces.
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385 | *
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386 | * All PTL0 entries in the given range will be mapped to a next level page
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387 | * table. The next level page table will be allocated and cleared.
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388 | *
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389 | * pt_mapping_remove() will never deallocate these page tables even when there
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390 | * are no PTEs in them.
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391 | *
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392 | * @param as Address space.
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393 | * @param base Base address corresponding to the first PTL0 entry that will be
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394 | * altered by this function.
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395 | * @param size Size in bytes defining the range of PTL0 entries that will be
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396 | * altered by this function.
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397 | *
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398 | */
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399 | void pt_mapping_make_global(uintptr_t base, size_t size)
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400 | {
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401 | assert(size > 0);
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402 |
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403 | uintptr_t ptl0 = PA2KA((uintptr_t) AS_KERNEL->genarch.page_table);
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404 | uintptr_t ptl0_step = ptl0_step_get();
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405 | size_t frames;
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406 |
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407 | #if (PTL1_ENTRIES != 0)
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408 | frames = PTL1_FRAMES;
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409 | #elif (PTL2_ENTRIES != 0)
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410 | frames = PTL2_FRAMES;
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411 | #else
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412 | frames = PTL3_FRAMES;
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413 | #endif
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414 |
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415 | for (uintptr_t addr = ALIGN_DOWN(base, ptl0_step);
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416 | addr - 1 < base + size - 1;
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417 | addr += ptl0_step) {
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418 | if (GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr)) != 0) {
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419 | assert(overlaps(addr, ptl0_step,
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420 | config.identity_base, config.identity_size));
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421 |
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422 | /*
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423 | * This PTL0 entry also maps the kernel identity region,
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424 | * so it is already global and initialized.
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425 | */
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426 | continue;
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427 | }
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428 |
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429 | uintptr_t l1 = PA2KA(frame_alloc(frames, FRAME_LOWMEM, 0));
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430 | memsetb((void *) l1, FRAMES2SIZE(frames), 0);
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431 | SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1));
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432 | SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr),
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433 | PAGE_PRESENT | PAGE_USER | PAGE_CACHEABLE |
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434 | PAGE_EXEC | PAGE_WRITE | PAGE_READ);
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435 | }
|
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436 | }
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437 |
|
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438 | /** @}
|
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439 | */
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