source: mainline/kernel/genarch/src/mm/page_pt.c@ 1b478f6

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1b478f6 was 6b326ea1, checked in by Jakub Jermar <jakub@…>, 14 years ago

Allocate page tables from low memory so that it will be still possible
to use PA2KA when walking it.

  • Property mode set to 100644
File size: 8.1 KB
RevLine 
[6d7ffa65]1/*
[df4ed85]2 * Copyright (c) 2006 Jakub Jermar
[6d7ffa65]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[f47fd19]29/** @addtogroup genarchmm
[b45c443]30 * @{
31 */
32
[0f27b4c]33/**
[b45c443]34 * @file
[da1bafb]35 * @brief Virtual Address Translation for hierarchical 4-level page tables.
[0f27b4c]36 */
37
[6d7ffa65]38#include <genarch/mm/page_pt.h>
39#include <mm/page.h>
40#include <mm/frame.h>
[ef67bab]41#include <mm/as.h>
[6d7ffa65]42#include <arch/mm/page.h>
[fc1e4f6]43#include <arch/mm/as.h>
[d99c1d2]44#include <typedefs.h>
[6d7ffa65]45#include <arch/asm.h>
46#include <memstr.h>
47
[da1bafb]48static void pt_mapping_insert(as_t *, uintptr_t, uintptr_t, unsigned int);
49static void pt_mapping_remove(as_t *, uintptr_t);
[235e6c7]50static pte_t *pt_mapping_find(as_t *, uintptr_t, bool);
[6d7ffa65]51
[f5935ed]52page_mapping_operations_t pt_mapping_operations = {
[6d7ffa65]53 .mapping_insert = pt_mapping_insert,
[8f00329]54 .mapping_remove = pt_mapping_remove,
[6d7ffa65]55 .mapping_find = pt_mapping_find
56};
57
58/** Map page to frame using hierarchical page tables.
59 *
[9179d0a]60 * Map virtual address page to physical address frame
61 * using flags.
[6d7ffa65]62 *
[da1bafb]63 * @param as Address space to wich page belongs.
64 * @param page Virtual address of the page to be mapped.
[6d7ffa65]65 * @param frame Physical address of memory frame to which the mapping is done.
66 * @param flags Flags to be used for mapping.
[da1bafb]67 *
[6d7ffa65]68 */
[da1bafb]69void pt_mapping_insert(as_t *as, uintptr_t page, uintptr_t frame,
70 unsigned int flags)
[6d7ffa65]71{
[da1bafb]72 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
[1d432f9]73
74 ASSERT(page_table_locked(as));
[da1bafb]75
[6d7ffa65]76 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
[6b326ea1]77 pte_t *newpt = (pte_t *) frame_alloc(PTL1_SIZE,
78 FRAME_LOWMEM | FRAME_KA);
[e32e092]79 memsetb(newpt, FRAME_SIZE << PTL1_SIZE, 0);
[6d7ffa65]80 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
[6b326ea1]81 SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page),
82 PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
83 PAGE_WRITE);
[6d7ffa65]84 }
[da1bafb]85
86 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
87
[6d7ffa65]88 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
[6b326ea1]89 pte_t *newpt = (pte_t *) frame_alloc(PTL2_SIZE,
90 FRAME_LOWMEM | FRAME_KA);
[e32e092]91 memsetb(newpt, FRAME_SIZE << PTL2_SIZE, 0);
[6d7ffa65]92 SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
[6b326ea1]93 SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page),
94 PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
95 PAGE_WRITE);
[6d7ffa65]96 }
[da1bafb]97
98 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
99
[6d7ffa65]100 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
[6b326ea1]101 pte_t *newpt = (pte_t *) frame_alloc(PTL3_SIZE,
102 FRAME_LOWMEM | FRAME_KA);
[e32e092]103 memsetb(newpt, FRAME_SIZE << PTL3_SIZE, 0);
[6d7ffa65]104 SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
[6b326ea1]105 SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page),
106 PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
107 PAGE_WRITE);
[6d7ffa65]108 }
[da1bafb]109
110 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
111
[6d7ffa65]112 SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
113 SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
114}
115
[8f00329]116/** Remove mapping of page from hierarchical page tables.
117 *
[9179d0a]118 * Remove any mapping of page within address space as.
[8f00329]119 * TLB shootdown should follow in order to make effects of
120 * this call visible.
121 *
[ecbdc724]122 * Empty page tables except PTL0 are freed.
123 *
[da1bafb]124 * @param as Address space to wich page belongs.
[8f00329]125 * @param page Virtual address of the page to be demapped.
[da1bafb]126 *
[8f00329]127 */
[7f1c620]128void pt_mapping_remove(as_t *as, uintptr_t page)
[8f00329]129{
[1d432f9]130 ASSERT(page_table_locked(as));
131
[ecbdc724]132 /*
133 * First, remove the mapping, if it exists.
[da1bafb]134 *
[ecbdc724]135 */
[da1bafb]136
137 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
[8f00329]138 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
139 return;
[da1bafb]140
141 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
[8f00329]142 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
143 return;
[da1bafb]144
145 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
[8f00329]146 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
147 return;
[da1bafb]148
149 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
150
[8f00329]151 /* Destroy the mapping. Setting to PAGE_NOT_PRESENT is not sufficient. */
[e32e092]152 memsetb(&ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
[da1bafb]153
[ecbdc724]154 /*
155 * Second, free all empty tables along the way from PTL3 down to PTL0.
[da1bafb]156 *
[ecbdc724]157 */
158
[da1bafb]159 /* Check PTL3 */
160 bool empty = true;
161
162 unsigned int i;
[ecbdc724]163 for (i = 0; i < PTL3_ENTRIES; i++) {
164 if (PTE_VALID(&ptl3[i])) {
165 empty = false;
166 break;
167 }
168 }
[da1bafb]169
[ecbdc724]170 if (empty) {
171 /*
172 * PTL3 is empty.
173 * Release the frame and remove PTL3 pointer from preceding table.
[da1bafb]174 *
[ecbdc724]175 */
[7f1c620]176 frame_free(KA2PA((uintptr_t) ptl3));
[da1bafb]177#if (PTL2_ENTRIES != 0)
178 memsetb(&ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
179#elif (PTL1_ENTRIES != 0)
180 memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
181#else
182 memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
183#endif
[ecbdc724]184 } else {
185 /*
186 * PTL3 is not empty.
187 * Therefore, there must be a path from PTL0 to PTL3 and
188 * thus nothing to free in higher levels.
[da1bafb]189 *
[ecbdc724]190 */
191 return;
192 }
193
[da1bafb]194 /* Check PTL2, empty is still true */
195#if (PTL2_ENTRIES != 0)
196 for (i = 0; i < PTL2_ENTRIES; i++) {
197 if (PTE_VALID(&ptl2[i])) {
198 empty = false;
199 break;
[ecbdc724]200 }
201 }
[da1bafb]202
203 if (empty) {
204 /*
205 * PTL2 is empty.
206 * Release the frame and remove PTL2 pointer from preceding table.
207 *
208 */
209 frame_free(KA2PA((uintptr_t) ptl2));
210#if (PTL1_ENTRIES != 0)
211 memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
212#else
213 memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
214#endif
215 } else {
216 /*
217 * PTL2 is not empty.
218 * Therefore, there must be a path from PTL0 to PTL2 and
219 * thus nothing to free in higher levels.
220 *
221 */
222 return;
223 }
224#endif /* PTL2_ENTRIES != 0 */
225
[ecbdc724]226 /* check PTL1, empty is still true */
[da1bafb]227#if (PTL1_ENTRIES != 0)
228 for (i = 0; i < PTL1_ENTRIES; i++) {
229 if (PTE_VALID(&ptl1[i])) {
230 empty = false;
231 break;
[ecbdc724]232 }
233 }
[da1bafb]234
235 if (empty) {
236 /*
237 * PTL1 is empty.
238 * Release the frame and remove PTL1 pointer from preceding table.
239 *
240 */
241 frame_free(KA2PA((uintptr_t) ptl1));
242 memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
243 }
244#endif /* PTL1_ENTRIES != 0 */
[8f00329]245}
246
[6d7ffa65]247/** Find mapping for virtual page in hierarchical page tables.
248 *
[235e6c7]249 * @param as Address space to which page belongs.
250 * @param page Virtual page.
251 * @param nolock True if the page tables need not be locked.
[6d7ffa65]252 *
[da1bafb]253 * @return NULL if there is no such mapping; entry from PTL3 describing
254 * the mapping otherwise.
255 *
[6d7ffa65]256 */
[235e6c7]257pte_t *pt_mapping_find(as_t *as, uintptr_t page, bool nolock)
[6d7ffa65]258{
[235e6c7]259 ASSERT(nolock || page_table_locked(as));
[1d432f9]260
[da1bafb]261 pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
[6d7ffa65]262 if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
263 return NULL;
[da1bafb]264
265 pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
[6d7ffa65]266 if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
267 return NULL;
[da1bafb]268
269 pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
[6d7ffa65]270 if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
271 return NULL;
[da1bafb]272
273 pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
274
[6d7ffa65]275 return &ptl3[PTL3_INDEX(page)];
276}
[b45c443]277
[f47fd19]278/** @}
[b45c443]279 */
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