[6d7ffa65] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[6d7ffa65] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[6404aca] | 29 | /** @addtogroup kernel_genarch_mm
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 |
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[0f27b4c] | 33 | /**
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[b45c443] | 34 | * @file
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[da1bafb] | 35 | * @brief Virtual Address Translation for hierarchical 4-level page tables.
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[0f27b4c] | 36 | */
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| 37 |
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[63e27ef] | 38 | #include <assert.h>
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[6d7ffa65] | 39 | #include <genarch/mm/page_pt.h>
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| 40 | #include <mm/page.h>
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| 41 | #include <mm/frame.h>
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[c72dc15] | 42 | #include <mm/km.h>
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[ef67bab] | 43 | #include <mm/as.h>
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[6d7ffa65] | 44 | #include <arch/mm/page.h>
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[fc1e4f6] | 45 | #include <arch/mm/as.h>
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[05882233] | 46 | #include <barrier.h>
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[d99c1d2] | 47 | #include <typedefs.h>
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[6d7ffa65] | 48 | #include <arch/asm.h>
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[b169619] | 49 | #include <memw.h>
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[c868e2d] | 50 | #include <align.h>
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| 51 | #include <macros.h>
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[caed0279] | 52 | #include <bitops.h>
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[6d7ffa65] | 53 |
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[da1bafb] | 54 | static void pt_mapping_insert(as_t *, uintptr_t, uintptr_t, unsigned int);
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| 55 | static void pt_mapping_remove(as_t *, uintptr_t);
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[38dc82d] | 56 | static bool pt_mapping_find(as_t *, uintptr_t, bool, pte_t *pte);
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[346b12a2] | 57 | static void pt_mapping_update(as_t *, uintptr_t, bool, pte_t *pte);
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[c868e2d] | 58 | static void pt_mapping_make_global(uintptr_t, size_t);
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[6d7ffa65] | 59 |
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[61eb2ce2] | 60 | const page_mapping_operations_t pt_mapping_operations = {
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[6d7ffa65] | 61 | .mapping_insert = pt_mapping_insert,
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[8f00329] | 62 | .mapping_remove = pt_mapping_remove,
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[c868e2d] | 63 | .mapping_find = pt_mapping_find,
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[346b12a2] | 64 | .mapping_update = pt_mapping_update,
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[c868e2d] | 65 | .mapping_make_global = pt_mapping_make_global
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[6d7ffa65] | 66 | };
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| 67 |
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| 68 | /** Map page to frame using hierarchical page tables.
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| 69 | *
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[9179d0a] | 70 | * Map virtual address page to physical address frame
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| 71 | * using flags.
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[6d7ffa65] | 72 | *
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[da1bafb] | 73 | * @param as Address space to wich page belongs.
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| 74 | * @param page Virtual address of the page to be mapped.
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[6d7ffa65] | 75 | * @param frame Physical address of memory frame to which the mapping is done.
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| 76 | * @param flags Flags to be used for mapping.
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[da1bafb] | 77 | *
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[6d7ffa65] | 78 | */
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[da1bafb] | 79 | void pt_mapping_insert(as_t *as, uintptr_t page, uintptr_t frame,
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| 80 | unsigned int flags)
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[6d7ffa65] | 81 | {
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[da1bafb] | 82 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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[1d432f9] | 83 |
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[63e27ef] | 84 | assert(page_table_locked(as));
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[a35b458] | 85 |
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[6d7ffa65] | 86 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
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[b0c2075] | 87 | pte_t *newpt = (pte_t *)
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[f18d01b6] | 88 | PA2KA(frame_alloc(PTL1_FRAMES, FRAME_LOWMEM, PTL1_SIZE - 1));
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| 89 | memsetb(newpt, PTL1_SIZE, 0);
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[6d7ffa65] | 90 | SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
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[6b326ea1] | 91 | SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page),
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[609a417] | 92 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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[6b326ea1] | 93 | PAGE_WRITE);
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[de73242] | 94 | /*
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| 95 | * Make sure that a concurrent hardware page table walk or
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| 96 | * pt_mapping_find() will see the new PTL1 only after it is
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| 97 | * fully initialized.
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| 98 | */
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[609a417] | 99 | write_barrier();
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| 100 | SET_PTL1_PRESENT(ptl0, PTL0_INDEX(page));
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[6d7ffa65] | 101 | }
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[a35b458] | 102 |
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[da1bafb] | 103 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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[a35b458] | 104 |
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[6d7ffa65] | 105 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
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[b0c2075] | 106 | pte_t *newpt = (pte_t *)
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[f18d01b6] | 107 | PA2KA(frame_alloc(PTL2_FRAMES, FRAME_LOWMEM, PTL2_SIZE - 1));
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| 108 | memsetb(newpt, PTL2_SIZE, 0);
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[6d7ffa65] | 109 | SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
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[6b326ea1] | 110 | SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page),
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[609a417] | 111 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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[6b326ea1] | 112 | PAGE_WRITE);
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[de73242] | 113 | /*
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| 114 | * Make the new PTL2 visible only after it is fully initialized.
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| 115 | */
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[609a417] | 116 | write_barrier();
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[e40b8066] | 117 | SET_PTL2_PRESENT(ptl1, PTL1_INDEX(page));
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[6d7ffa65] | 118 | }
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[a35b458] | 119 |
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[da1bafb] | 120 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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[a35b458] | 121 |
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[6d7ffa65] | 122 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
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[b0c2075] | 123 | pte_t *newpt = (pte_t *)
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[f18d01b6] | 124 | PA2KA(frame_alloc(PTL3_FRAMES, FRAME_LOWMEM, PTL2_SIZE - 1));
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| 125 | memsetb(newpt, PTL2_SIZE, 0);
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[6d7ffa65] | 126 | SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
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[6b326ea1] | 127 | SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page),
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[609a417] | 128 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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[6b326ea1] | 129 | PAGE_WRITE);
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[de73242] | 130 | /*
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| 131 | * Make the new PTL3 visible only after it is fully initialized.
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| 132 | */
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[609a417] | 133 | write_barrier();
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| 134 | SET_PTL3_PRESENT(ptl2, PTL2_INDEX(page));
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[6d7ffa65] | 135 | }
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[a35b458] | 136 |
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[da1bafb] | 137 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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[a35b458] | 138 |
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[6d7ffa65] | 139 | SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
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[609a417] | 140 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags | PAGE_NOT_PRESENT);
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[de73242] | 141 | /*
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| 142 | * Make the new mapping visible only after it is fully initialized.
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| 143 | */
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[609a417] | 144 | write_barrier();
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| 145 | SET_FRAME_PRESENT(ptl3, PTL3_INDEX(page));
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[6d7ffa65] | 146 | }
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| 147 |
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[8f00329] | 148 | /** Remove mapping of page from hierarchical page tables.
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| 149 | *
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[9179d0a] | 150 | * Remove any mapping of page within address space as.
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[8f00329] | 151 | * TLB shootdown should follow in order to make effects of
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| 152 | * this call visible.
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| 153 | *
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[ecbdc724] | 154 | * Empty page tables except PTL0 are freed.
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| 155 | *
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[da1bafb] | 156 | * @param as Address space to wich page belongs.
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[8f00329] | 157 | * @param page Virtual address of the page to be demapped.
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[da1bafb] | 158 | *
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[8f00329] | 159 | */
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[7f1c620] | 160 | void pt_mapping_remove(as_t *as, uintptr_t page)
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[8f00329] | 161 | {
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[63e27ef] | 162 | assert(page_table_locked(as));
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[1d432f9] | 163 |
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[ecbdc724] | 164 | /*
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| 165 | * First, remove the mapping, if it exists.
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| 166 | */
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[a35b458] | 167 |
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[da1bafb] | 168 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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[8f00329] | 169 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
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| 170 | return;
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[a35b458] | 171 |
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[da1bafb] | 172 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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[8f00329] | 173 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
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| 174 | return;
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[a35b458] | 175 |
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[da1bafb] | 176 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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[8f00329] | 177 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
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| 178 | return;
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[a35b458] | 179 |
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[da1bafb] | 180 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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[a35b458] | 181 |
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[c868e2d] | 182 | /*
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| 183 | * Destroy the mapping.
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| 184 | * Setting to PAGE_NOT_PRESENT is not sufficient.
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[15187c3] | 185 | * But we need SET_FRAME for possible PT coherence maintenance.
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| 186 | * At least on ARM.
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[c868e2d] | 187 | */
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[15187c3] | 188 | //TODO: Fix this inconsistency
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| 189 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), PAGE_NOT_PRESENT);
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[e32e092] | 190 | memsetb(&ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
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[a35b458] | 191 |
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[ecbdc724] | 192 | /*
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[c72dc15] | 193 | * Second, free all empty tables along the way from PTL3 down to PTL0
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| 194 | * except those needed for sharing the kernel non-identity mappings.
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[ecbdc724] | 195 | */
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[a35b458] | 196 |
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[da1bafb] | 197 | /* Check PTL3 */
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| 198 | bool empty = true;
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[a35b458] | 199 |
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[da1bafb] | 200 | unsigned int i;
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[ecbdc724] | 201 | for (i = 0; i < PTL3_ENTRIES; i++) {
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| 202 | if (PTE_VALID(&ptl3[i])) {
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| 203 | empty = false;
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| 204 | break;
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| 205 | }
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| 206 | }
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[a35b458] | 207 |
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[ecbdc724] | 208 | if (empty) {
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| 209 | /*
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| 210 | * PTL3 is empty.
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[c72dc15] | 211 | * Release the frame and remove PTL3 pointer from the parent
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| 212 | * table.
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[ecbdc724] | 213 | */
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[da1bafb] | 214 | #if (PTL2_ENTRIES != 0)
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| 215 | memsetb(&ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
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| 216 | #elif (PTL1_ENTRIES != 0)
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| 217 | memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
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| 218 | #else
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[c72dc15] | 219 | if (km_is_non_identity(page))
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| 220 | return;
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| 221 |
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[da1bafb] | 222 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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| 223 | #endif
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[5df1963] | 224 | frame_free(KA2PA((uintptr_t) ptl3), PTL3_FRAMES);
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[ecbdc724] | 225 | } else {
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| 226 | /*
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| 227 | * PTL3 is not empty.
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| 228 | * Therefore, there must be a path from PTL0 to PTL3 and
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| 229 | * thus nothing to free in higher levels.
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[da1bafb] | 230 | *
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[ecbdc724] | 231 | */
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| 232 | return;
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| 233 | }
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[a35b458] | 234 |
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[da1bafb] | 235 | /* Check PTL2, empty is still true */
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| 236 | #if (PTL2_ENTRIES != 0)
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| 237 | for (i = 0; i < PTL2_ENTRIES; i++) {
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| 238 | if (PTE_VALID(&ptl2[i])) {
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| 239 | empty = false;
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| 240 | break;
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[ecbdc724] | 241 | }
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| 242 | }
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[a35b458] | 243 |
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[da1bafb] | 244 | if (empty) {
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| 245 | /*
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| 246 | * PTL2 is empty.
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[c72dc15] | 247 | * Release the frame and remove PTL2 pointer from the parent
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| 248 | * table.
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[da1bafb] | 249 | */
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| 250 | #if (PTL1_ENTRIES != 0)
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| 251 | memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
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| 252 | #else
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[c72dc15] | 253 | if (km_is_non_identity(page))
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| 254 | return;
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| 255 |
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[da1bafb] | 256 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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| 257 | #endif
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[5df1963] | 258 | frame_free(KA2PA((uintptr_t) ptl2), PTL2_FRAMES);
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[da1bafb] | 259 | } else {
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| 260 | /*
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| 261 | * PTL2 is not empty.
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| 262 | * Therefore, there must be a path from PTL0 to PTL2 and
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| 263 | * thus nothing to free in higher levels.
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| 264 | *
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| 265 | */
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| 266 | return;
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| 267 | }
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| 268 | #endif /* PTL2_ENTRIES != 0 */
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[a35b458] | 269 |
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[ecbdc724] | 270 | /* check PTL1, empty is still true */
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[da1bafb] | 271 | #if (PTL1_ENTRIES != 0)
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| 272 | for (i = 0; i < PTL1_ENTRIES; i++) {
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| 273 | if (PTE_VALID(&ptl1[i])) {
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| 274 | empty = false;
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| 275 | break;
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[ecbdc724] | 276 | }
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| 277 | }
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[a35b458] | 278 |
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[da1bafb] | 279 | if (empty) {
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| 280 | /*
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| 281 | * PTL1 is empty.
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[c72dc15] | 282 | * Release the frame and remove PTL1 pointer from the parent
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| 283 | * table.
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[da1bafb] | 284 | */
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[c72dc15] | 285 | if (km_is_non_identity(page))
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| 286 | return;
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| 287 |
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[da1bafb] | 288 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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[5df1963] | 289 | frame_free(KA2PA((uintptr_t) ptl1), PTL1_FRAMES);
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[da1bafb] | 290 | }
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| 291 | #endif /* PTL1_ENTRIES != 0 */
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[8f00329] | 292 | }
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| 293 |
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[346b12a2] | 294 | static pte_t *pt_mapping_find_internal(as_t *as, uintptr_t page, bool nolock)
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[6d7ffa65] | 295 | {
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[63e27ef] | 296 | assert(nolock || page_table_locked(as));
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[1d432f9] | 297 |
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[da1bafb] | 298 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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[6d7ffa65] | 299 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
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[346b12a2] | 300 | return NULL;
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[e943ecf] | 301 |
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| 302 | read_barrier();
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[a35b458] | 303 |
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[da1bafb] | 304 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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[6d7ffa65] | 305 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
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[346b12a2] | 306 | return NULL;
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[e943ecf] | 307 |
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| 308 | #if (PTL1_ENTRIES != 0)
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[de73242] | 309 | /*
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| 310 | * Always read ptl2 only after we are sure it is present.
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| 311 | */
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[e943ecf] | 312 | read_barrier();
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| 313 | #endif
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[a35b458] | 314 |
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[da1bafb] | 315 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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[6d7ffa65] | 316 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
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[346b12a2] | 317 | return NULL;
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[e943ecf] | 318 |
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| 319 | #if (PTL2_ENTRIES != 0)
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[de73242] | 320 | /*
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| 321 | * Always read ptl3 only after we are sure it is present.
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| 322 | */
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[e943ecf] | 323 | read_barrier();
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| 324 | #endif
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[a35b458] | 325 |
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[da1bafb] | 326 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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[a35b458] | 327 |
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[346b12a2] | 328 | return &ptl3[PTL3_INDEX(page)];
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| 329 | }
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| 330 |
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| 331 | /** Find mapping for virtual page in hierarchical page tables.
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| 332 | *
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| 333 | * @param as Address space to which page belongs.
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| 334 | * @param page Virtual page.
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| 335 | * @param nolock True if the page tables need not be locked.
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| 336 | * @param[out] pte Structure that will receive a copy of the found PTE.
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| 337 | *
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| 338 | * @return True if the mapping was found, false otherwise.
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| 339 | */
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| 340 | bool pt_mapping_find(as_t *as, uintptr_t page, bool nolock, pte_t *pte)
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| 341 | {
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| 342 | pte_t *t = pt_mapping_find_internal(as, page, nolock);
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| 343 | if (t)
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| 344 | *pte = *t;
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| 345 | return t != NULL;
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| 346 | }
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| 347 |
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| 348 | /** Update mapping for virtual page in hierarchical page tables.
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| 349 | *
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| 350 | * @param as Address space to which page belongs.
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| 351 | * @param page Virtual page.
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| 352 | * @param nolock True if the page tables need not be locked.
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| 353 | * @param[in] pte New PTE.
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| 354 | */
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| 355 | void pt_mapping_update(as_t *as, uintptr_t page, bool nolock, pte_t *pte)
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| 356 | {
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| 357 | pte_t *t = pt_mapping_find_internal(as, page, nolock);
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| 358 | if (!t)
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[1b20da0] | 359 | panic("Updating non-existent PTE");
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[346b12a2] | 360 |
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[63e27ef] | 361 | assert(PTE_VALID(t) == PTE_VALID(pte));
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| 362 | assert(PTE_PRESENT(t) == PTE_PRESENT(pte));
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| 363 | assert(PTE_GET_FRAME(t) == PTE_GET_FRAME(pte));
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| 364 | assert(PTE_WRITABLE(t) == PTE_WRITABLE(pte));
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| 365 | assert(PTE_EXECUTABLE(t) == PTE_EXECUTABLE(pte));
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[346b12a2] | 366 |
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| 367 | *t = *pte;
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[6d7ffa65] | 368 | }
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[b45c443] | 369 |
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[caed0279] | 370 | /** Return the size of the region mapped by a single PTL0 entry.
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| 371 | *
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| 372 | * @return Size of the region mapped by a single PTL0 entry.
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| 373 | */
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| 374 | static uintptr_t ptl0_step_get(void)
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| 375 | {
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| 376 | size_t va_bits;
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| 377 |
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| 378 | va_bits = fnzb(PTL0_ENTRIES) + fnzb(PTL1_ENTRIES) + fnzb(PTL2_ENTRIES) +
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| 379 | fnzb(PTL3_ENTRIES) + PAGE_WIDTH;
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| 380 |
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| 381 | return 1UL << (va_bits - fnzb(PTL0_ENTRIES));
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| 382 | }
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| 383 |
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[c868e2d] | 384 | /** Make the mappings in the given range global accross all address spaces.
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| 385 | *
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| 386 | * All PTL0 entries in the given range will be mapped to a next level page
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| 387 | * table. The next level page table will be allocated and cleared.
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| 388 | *
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| 389 | * pt_mapping_remove() will never deallocate these page tables even when there
|
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| 390 | * are no PTEs in them.
|
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| 391 | *
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| 392 | * @param as Address space.
|
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| 393 | * @param base Base address corresponding to the first PTL0 entry that will be
|
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| 394 | * altered by this function.
|
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| 395 | * @param size Size in bytes defining the range of PTL0 entries that will be
|
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| 396 | * altered by this function.
|
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[e2a0d76] | 397 | *
|
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[c868e2d] | 398 | */
|
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| 399 | void pt_mapping_make_global(uintptr_t base, size_t size)
|
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| 400 | {
|
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[63e27ef] | 401 | assert(size > 0);
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[a35b458] | 402 |
|
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[c868e2d] | 403 | uintptr_t ptl0 = PA2KA((uintptr_t) AS_KERNEL->genarch.page_table);
|
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[caed0279] | 404 | uintptr_t ptl0_step = ptl0_step_get();
|
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[b0c2075] | 405 | size_t frames;
|
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[a35b458] | 406 |
|
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[c868e2d] | 407 | #if (PTL1_ENTRIES != 0)
|
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[b0c2075] | 408 | frames = PTL1_FRAMES;
|
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[c868e2d] | 409 | #elif (PTL2_ENTRIES != 0)
|
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[b0c2075] | 410 | frames = PTL2_FRAMES;
|
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[c868e2d] | 411 | #else
|
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[b0c2075] | 412 | frames = PTL3_FRAMES;
|
---|
[c868e2d] | 413 | #endif
|
---|
[a35b458] | 414 |
|
---|
[e2a0d76] | 415 | for (uintptr_t addr = ALIGN_DOWN(base, ptl0_step);
|
---|
| 416 | addr - 1 < base + size - 1;
|
---|
[caed0279] | 417 | addr += ptl0_step) {
|
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[db8626d] | 418 | if (GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr)) != 0) {
|
---|
[63e27ef] | 419 | assert(overlaps(addr, ptl0_step,
|
---|
[17af882] | 420 | config.identity_base, config.identity_size));
|
---|
| 421 |
|
---|
| 422 | /*
|
---|
| 423 | * This PTL0 entry also maps the kernel identity region,
|
---|
| 424 | * so it is already global and initialized.
|
---|
| 425 | */
|
---|
| 426 | continue;
|
---|
| 427 | }
|
---|
| 428 |
|
---|
[b0c2075] | 429 | uintptr_t l1 = PA2KA(frame_alloc(frames, FRAME_LOWMEM, 0));
|
---|
| 430 | memsetb((void *) l1, FRAMES2SIZE(frames), 0);
|
---|
[c868e2d] | 431 | SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1));
|
---|
| 432 | SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr),
|
---|
[34ab31c0] | 433 | PAGE_PRESENT | PAGE_USER | PAGE_CACHEABLE |
|
---|
| 434 | PAGE_EXEC | PAGE_WRITE | PAGE_READ);
|
---|
[c868e2d] | 435 | }
|
---|
| 436 | }
|
---|
| 437 |
|
---|
[f47fd19] | 438 | /** @}
|
---|
[b45c443] | 439 | */
|
---|