source: mainline/kernel/genarch/src/drivers/omap/uart.c@ 63e27ef

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 63e27ef was 63e27ef, checked in by Jiri Svoboda <jiri@…>, 8 years ago

ASSERT → assert

  • Property mode set to 100644
File size: 5.4 KB
Line 
1/*
2 * Copyright (c) 2012 Jan Vesely
3 * Copyright (c) 2013 Maurizio Lombardi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29/** @addtogroup genarch
30 * @{
31 */
32/**
33 * @file
34 * @brief Texas Instruments OMAP on-chip uart serial line driver.
35 */
36
37#include <assert.h>
38#include <genarch/drivers/omap/uart.h>
39#include <ddi/device.h>
40#include <str.h>
41#include <mm/km.h>
42
43static void omap_uart_txb(omap_uart_t *uart, uint8_t b)
44{
45 /* Wait for buffer */
46 while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG);
47 /* Write to the outgoing fifo */
48 uart->regs->thr = b;
49}
50
51static void omap_uart_putchar(outdev_t *dev, wchar_t ch)
52{
53 omap_uart_t *uart = dev->data;
54 if (!ascii_check(ch)) {
55 omap_uart_txb(uart, U_SPECIAL);
56 } else {
57 if (ch == '\n')
58 omap_uart_txb(uart, '\r');
59 omap_uart_txb(uart, ch);
60 }
61}
62
63static outdev_operations_t omap_uart_ops = {
64 .write = omap_uart_putchar,
65 .redraw = NULL,
66 .scroll_up = NULL,
67 .scroll_down = NULL
68};
69
70static irq_ownership_t omap_uart_claim(irq_t *irq)
71{
72 return IRQ_ACCEPT;
73}
74
75static void omap_uart_handler(irq_t *irq)
76{
77 omap_uart_t *uart = irq->instance;
78 while ((uart->regs->rx_fifo_lvl)) {
79 const uint8_t val = uart->regs->rhr;
80 if (uart->indev && val) {
81 indev_push_character(uart->indev, val);
82 }
83 }
84}
85
86bool omap_uart_init(
87 omap_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
88{
89 assert(uart);
90 uart->regs = (void *)km_map(addr, size, PAGE_NOT_CACHEABLE);
91
92 assert(uart->regs);
93
94 /* Soft reset the port */
95 uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG;
96 while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG));
97
98 /* Disable the UART module */
99 uart->regs->mdr1 |= OMAP_UART_MDR_MS_DISABLE;
100
101 /* Enable access to EFR register */
102 uart->regs->lcr = 0xbf; /* Sets config mode B */
103
104 /* Enable access to TCL_TLR register */
105 const bool enhanced = uart->regs->efr & OMAP_UART_EFR_ENH_FLAG;
106 uart->regs->efr |= OMAP_UART_EFR_ENH_FLAG; /* Turn on enh. */
107 uart->regs->lcr = 0x80; /* Config mode A */
108
109 /* Set default (val 0) triggers, disable DMA enable FIFOs */
110 const bool tcl_tlr = uart->regs->mcr & OMAP_UART_MCR_TCR_TLR_FLAG;
111 /* Enable access to tcr and tlr registers */
112 uart->regs->mcr |= OMAP_UART_MCR_TCR_TLR_FLAG;
113
114 /* Enable FIFOs */
115 uart->regs->fcr = OMAP_UART_FCR_FIFO_EN_FLAG;
116
117 /* Enable fine granularity for RX FIFO and set trigger level to 1,
118 * TX FIFO, trigger level is irrelevant*/
119 uart->regs->lcr = 0xBF; /* Sets config mode B */
120 uart->regs->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_FLAG;
121 uart->regs->tlr = 1 << OMAP_UART_TLR_RX_FIFO_TRIG_SHIFT;
122
123 /* Sets config mode A */
124 uart->regs->lcr = 0x80;
125 /* Restore tcl_tlr access flag */
126 if (!tcl_tlr)
127 uart->regs->mcr &= ~OMAP_UART_MCR_TCR_TLR_FLAG;
128 /* Sets config mode B */
129 uart->regs->lcr = 0xBF;
130
131 /* Set the divisor value to get a baud rate of 115200 bps */
132 uart->regs->dll = 0x1A;
133 uart->regs->dlh = 0x00;
134
135 /* Restore enhanced */
136 if (!enhanced)
137 uart->regs->efr &= ~OMAP_UART_EFR_ENH_FLAG;
138
139 /* Set the DIV_EN bit to 0 */
140 uart->regs->lcr &= ~OMAP_UART_LCR_DIV_EN_FLAG;
141 /* Set the BREAK_EN bit to 0 */
142 uart->regs->lcr &= ~OMAP_UART_LCR_BREAK_EN_FLAG;
143 /* No parity */
144 uart->regs->lcr &= ~OMAP_UART_LCR_PARITY_EN_FLAG;
145 /* Stop = 1 bit */
146 uart->regs->lcr &= ~OMAP_UART_LCR_NB_STOP_FLAG;
147 /* Char length = 8 bits */
148 uart->regs->lcr |= OMAP_UART_LCR_CHAR_LENGTH_8BITS;
149
150 /* Enable the UART module */
151 uart->regs->mdr1 &= (OMAP_UART_MDR_MS_UART16 &
152 ~OMAP_UART_MDR_MS_MASK);
153
154 /* Disable interrupts */
155 uart->regs->ier = 0;
156
157 /* Setup outdev */
158 outdev_initialize("omap_uart_dev", &uart->outdev, &omap_uart_ops);
159 uart->outdev.data = uart;
160
161 /* Initialize IRQ */
162 irq_initialize(&uart->irq);
163 uart->irq.devno = device_assign_devno();
164 uart->irq.inr = interrupt;
165 uart->irq.claim = omap_uart_claim;
166 uart->irq.handler = omap_uart_handler;
167 uart->irq.instance = uart;
168
169 return true;
170}
171
172void omap_uart_input_wire(omap_uart_t *uart, indev_t *indev)
173{
174 assert(uart);
175 /* Set indev */
176 uart->indev = indev;
177 /* Register interrupt. */
178 irq_register(&uart->irq);
179 /* Enable interrupt on receive */
180 uart->regs->ier |= OMAP_UART_IER_RHR_IRQ_FLAG;
181}
182
183/**
184 * @}
185 */
186
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