source: mainline/kernel/genarch/src/drivers/omap/uart.c@ 09ab0a9a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 09ab0a9a was 09ab0a9a, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Fix vertical spacing with new Ccheck revision.

  • Property mode set to 100644
File size: 5.4 KB
Line 
1/*
2 * Copyright (c) 2012 Jan Vesely
3 * Copyright (c) 2013 Maurizio Lombardi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29/** @addtogroup genarch
30 * @{
31 */
32/**
33 * @file
34 * @brief Texas Instruments OMAP on-chip uart serial line driver.
35 */
36
37#include <assert.h>
38#include <genarch/drivers/omap/uart.h>
39#include <str.h>
40#include <mm/km.h>
41
42static void omap_uart_txb(omap_uart_t *uart, uint8_t b)
43{
44 /* Wait for buffer */
45 while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG)
46 ;
47 /* Write to the outgoing fifo */
48 uart->regs->thr = b;
49}
50
51static void omap_uart_putwchar(outdev_t *dev, wchar_t ch)
52{
53 omap_uart_t *uart = dev->data;
54 if (!ascii_check(ch)) {
55 omap_uart_txb(uart, U_SPECIAL);
56 } else {
57 if (ch == '\n')
58 omap_uart_txb(uart, '\r');
59 omap_uart_txb(uart, ch);
60 }
61}
62
63static outdev_operations_t omap_uart_ops = {
64 .write = omap_uart_putwchar,
65 .redraw = NULL,
66 .scroll_up = NULL,
67 .scroll_down = NULL
68};
69
70static irq_ownership_t omap_uart_claim(irq_t *irq)
71{
72 return IRQ_ACCEPT;
73}
74
75static void omap_uart_handler(irq_t *irq)
76{
77 omap_uart_t *uart = irq->instance;
78 while ((uart->regs->rx_fifo_lvl)) {
79 const uint8_t val = uart->regs->rhr;
80 if (uart->indev && val) {
81 indev_push_character(uart->indev, val);
82 }
83 }
84}
85
86bool omap_uart_init(
87 omap_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
88{
89 assert(uart);
90 uart->regs = (void *)km_map(addr, size, KM_NATURAL_ALIGNMENT,
91 PAGE_NOT_CACHEABLE);
92
93 assert(uart->regs);
94
95 /* Soft reset the port */
96 uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG;
97 while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG))
98 ;
99
100 /* Disable the UART module */
101 uart->regs->mdr1 |= OMAP_UART_MDR_MS_DISABLE;
102
103 /* Enable access to EFR register */
104 uart->regs->lcr = 0xbf; /* Sets config mode B */
105
106 /* Enable access to TCL_TLR register */
107 const bool enhanced = uart->regs->efr & OMAP_UART_EFR_ENH_FLAG;
108 uart->regs->efr |= OMAP_UART_EFR_ENH_FLAG; /* Turn on enh. */
109 uart->regs->lcr = 0x80; /* Config mode A */
110
111 /* Set default (val 0) triggers, disable DMA enable FIFOs */
112 const bool tcl_tlr = uart->regs->mcr & OMAP_UART_MCR_TCR_TLR_FLAG;
113 /* Enable access to tcr and tlr registers */
114 uart->regs->mcr |= OMAP_UART_MCR_TCR_TLR_FLAG;
115
116 /* Enable FIFOs */
117 uart->regs->fcr = OMAP_UART_FCR_FIFO_EN_FLAG;
118
119 /*
120 * Enable fine granularity for RX FIFO and set trigger level to 1,
121 * TX FIFO, trigger level is irrelevant
122 */
123 uart->regs->lcr = 0xBF; /* Sets config mode B */
124 uart->regs->scr = OMAP_UART_SCR_RX_TRIG_GRANU1_FLAG;
125 uart->regs->tlr = 1 << OMAP_UART_TLR_RX_FIFO_TRIG_SHIFT;
126
127 /* Sets config mode A */
128 uart->regs->lcr = 0x80;
129 /* Restore tcl_tlr access flag */
130 if (!tcl_tlr)
131 uart->regs->mcr &= ~OMAP_UART_MCR_TCR_TLR_FLAG;
132 /* Sets config mode B */
133 uart->regs->lcr = 0xBF;
134
135 /* Set the divisor value to get a baud rate of 115200 bps */
136 uart->regs->dll = 0x1A;
137 uart->regs->dlh = 0x00;
138
139 /* Restore enhanced */
140 if (!enhanced)
141 uart->regs->efr &= ~OMAP_UART_EFR_ENH_FLAG;
142
143 /* Set the DIV_EN bit to 0 */
144 uart->regs->lcr &= ~OMAP_UART_LCR_DIV_EN_FLAG;
145 /* Set the BREAK_EN bit to 0 */
146 uart->regs->lcr &= ~OMAP_UART_LCR_BREAK_EN_FLAG;
147 /* No parity */
148 uart->regs->lcr &= ~OMAP_UART_LCR_PARITY_EN_FLAG;
149 /* Stop = 1 bit */
150 uart->regs->lcr &= ~OMAP_UART_LCR_NB_STOP_FLAG;
151 /* Char length = 8 bits */
152 uart->regs->lcr |= OMAP_UART_LCR_CHAR_LENGTH_8BITS;
153
154 /* Enable the UART module */
155 uart->regs->mdr1 &= (OMAP_UART_MDR_MS_UART16 &
156 ~OMAP_UART_MDR_MS_MASK);
157
158 /* Disable interrupts */
159 uart->regs->ier = 0;
160
161 /* Setup outdev */
162 outdev_initialize("omap_uart_dev", &uart->outdev, &omap_uart_ops);
163 uart->outdev.data = uart;
164
165 /* Initialize IRQ */
166 irq_initialize(&uart->irq);
167 uart->irq.inr = interrupt;
168 uart->irq.claim = omap_uart_claim;
169 uart->irq.handler = omap_uart_handler;
170 uart->irq.instance = uart;
171
172 return true;
173}
174
175void omap_uart_input_wire(omap_uart_t *uart, indev_t *indev)
176{
177 assert(uart);
178 /* Set indev */
179 uart->indev = indev;
180 /* Register interrupt. */
181 irq_register(&uart->irq);
182 /* Enable interrupt on receive */
183 uart->regs->ier |= OMAP_UART_IER_RHR_IRQ_FLAG;
184}
185
186/**
187 * @}
188 */
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