1 | /*
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2 | * Copyright (c) 2001-2004 Jakub Jermar
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup kernel_genarch
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30 | * @{
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31 | */
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32 | /**
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33 | * @file
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34 | * @brief i8259 driver.
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35 | *
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36 | * Programmable Interrupt Controller for UP systems based on i8259 chip.
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37 | */
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38 |
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39 | #include <genarch/drivers/i8259/i8259.h>
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40 | #include <typedefs.h>
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41 | #include <stdint.h>
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42 | #include <log.h>
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43 | #include <interrupt.h>
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44 |
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45 | /* ICW1 bits */
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46 | #define I8259_ICW1 (1 << 4)
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47 | #define I8259_ICW1_NEEDICW4 (1 << 0)
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48 |
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49 | /* OCW3 bits */
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50 | #define I8259_OCW3 (1 << 3)
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51 | #define I8259_OCW3_READ_ISR (3 << 0)
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52 |
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53 | /* OCW4 bits */
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54 | #define I8259_OCW4 (0 << 3)
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55 | #define I8259_OCW4_NSEOI (1 << 5)
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56 |
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57 | #define I8259_IRQ_COUNT 8
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58 |
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59 | #define I8259_IRQ_SLAVE 2
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60 |
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61 | static const char *i8259_get_name(void);
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62 |
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63 | pic_ops_t i8259_pic_ops = {
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64 | .get_name = i8259_get_name,
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65 | .enable_irqs = i8259_enable_irqs,
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66 | .disable_irqs = i8259_disable_irqs,
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67 | .eoi = i8259_eoi,
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68 | .is_spurious = i8259_is_spurious,
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69 | .handle_spurious = i8259_handle_spurious
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70 | };
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71 |
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72 | // XXX: need to change pic_* API to get rid of these
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73 | static i8259_t *saved_pic0;
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74 | static i8259_t *saved_pic1;
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75 |
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76 | void i8259_init(i8259_t *pic0, i8259_t *pic1, unsigned int irq0_vec)
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77 | {
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78 | saved_pic0 = pic0;
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79 | saved_pic1 = pic1;
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80 |
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81 | /* ICW1: this is ICW1, ICW4 to follow */
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82 | pio_write_8(&pic0->port1, I8259_ICW1 | I8259_ICW1_NEEDICW4);
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83 |
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84 | /* ICW2: IRQ 0 maps to interrupt vector address irq0_vec */
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85 | pio_write_8(&pic0->port2, irq0_vec);
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86 |
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87 | /* ICW3: pic1 using IRQ I8259_IRQ_SLAVE */
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88 | pio_write_8(&pic0->port2, 1 << I8259_IRQ_SLAVE);
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89 |
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90 | /* ICW4: i8086 mode */
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91 | pio_write_8(&pic0->port2, 1);
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92 |
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93 | /* ICW1: ICW1, ICW4 to follow */
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94 | pio_write_8(&pic1->port1, I8259_ICW1 | I8259_ICW1_NEEDICW4);
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95 |
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96 | /* ICW2: IRQ 8 maps to interrupt vector address irq0_vec + 8 */
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97 | pio_write_8(&pic1->port2, irq0_vec + I8259_IRQ_COUNT);
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98 |
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99 | /* ICW3: pic1 is known as I8259_IRQ_SLAVE */
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100 | pio_write_8(&pic1->port2, I8259_IRQ_SLAVE);
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101 |
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102 | /* ICW4: i8086 mode */
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103 | pio_write_8(&pic1->port2, 1);
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104 |
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105 | /* disable all irq's */
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106 | i8259_disable_irqs(0xffff);
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107 | /* but enable I8259_IRQ_SLAVE */
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108 | i8259_enable_irqs(1 << I8259_IRQ_SLAVE);
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109 | }
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110 |
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111 | const char *i8259_get_name(void)
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112 | {
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113 | return "i8259";
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114 | }
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115 |
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116 | void i8259_enable_irqs(uint16_t irqmask)
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117 | {
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118 | uint8_t x;
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119 |
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120 | if (irqmask & 0xff) {
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121 | x = pio_read_8(&saved_pic0->port2);
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122 | pio_write_8(&saved_pic0->port2,
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123 | (uint8_t) (x & (~(irqmask & 0xff))));
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124 | }
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125 | if (irqmask >> I8259_IRQ_COUNT) {
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126 | x = pio_read_8(&saved_pic1->port2);
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127 | pio_write_8(&saved_pic1->port2,
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128 | (uint8_t) (x & (~(irqmask >> I8259_IRQ_COUNT))));
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129 | }
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130 | }
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131 |
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132 | void i8259_disable_irqs(uint16_t irqmask)
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133 | {
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134 | uint8_t x;
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135 |
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136 | if (irqmask & 0xff) {
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137 | x = pio_read_8(&saved_pic0->port2);
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138 | pio_write_8(&saved_pic0->port2,
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139 | (uint8_t) (x | (irqmask & 0xff)));
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140 | }
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141 | if (irqmask >> I8259_IRQ_COUNT) {
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142 | x = pio_read_8(&saved_pic1->port2);
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143 | pio_write_8(&saved_pic1->port2,
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144 | (uint8_t) (x | (irqmask >> I8259_IRQ_COUNT)));
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145 | }
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146 | }
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147 |
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148 | void i8259_eoi(unsigned int irq)
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149 | {
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150 | if (irq >= I8259_IRQ_COUNT)
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151 | pio_write_8(&saved_pic1->port1, I8259_OCW4 | I8259_OCW4_NSEOI);
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152 | pio_write_8(&saved_pic0->port1, I8259_OCW4 | I8259_OCW4_NSEOI);
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153 | }
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154 |
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155 | bool i8259_is_spurious(unsigned int irq)
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156 | {
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157 | pio_write_8(&saved_pic0->port1, I8259_OCW3 | I8259_OCW3_READ_ISR);
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158 | pio_write_8(&saved_pic1->port1, I8259_OCW3 | I8259_OCW3_READ_ISR);
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159 | uint8_t isr_lo = pio_read_8(&saved_pic0->port1);
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160 | uint8_t isr_hi = pio_read_8(&saved_pic1->port1);
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161 | return !(((isr_hi << I8259_IRQ_COUNT) | isr_lo) & (1 << irq));
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162 | }
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163 |
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164 | void i8259_handle_spurious(unsigned int irq)
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165 | {
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166 | /* For spurious IRQs from pic1, we need to isssue an EOI to pic0 */
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167 | if (irq >= I8259_IRQ_COUNT)
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168 | pio_write_8(&saved_pic0->port1, I8259_OCW4 | I8259_OCW4_NSEOI);
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169 | }
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170 |
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171 | /** @}
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172 | */
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