source: mainline/kernel/genarch/src/drivers/i8042/i8042.c

Last change on this file was d1582b50, checked in by Jiri Svoboda <jiri@…>, 5 years ago

Fix spacing in single-line comments using latest ccheck

This found incorrectly formatted section comments (with blocks of
asterisks or dashes). I strongly believe against using section comments
but I am not simply removing them since that would probably be
controversial.

  • Property mode set to 100644
File size: 3.8 KB
RevLine 
[f761f1eb]1/*
[4c7257b]2 * Copyright (c) 2009 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[6404aca]29/** @addtogroup kernel_genarch
[b45c443]30 * @{
31 */
[3c5006a0]32/**
[cc73a8a1]33 * @file
[3c79afe]34 * @brief i8042 processor driver
[3c5006a0]35 *
[411b6a6]36 * It takes care of the i8042 serial communication.
[c8bf88d]37 *
[b45c443]38 */
39
[63e27ef]40#include <assert.h>
[411b6a6]41#include <genarch/drivers/i8042/i8042.h>
[91825d90]42#include <genarch/drivers/legacy/ia32/io.h>
[f761f1eb]43#include <arch/asm.h>
[607c5f9]44#include <console/chardev.h>
[aafed15]45#include <stdlib.h>
[1adbf90]46#include <time/delay.h>
[6ccb238]47
[3c79afe]48#define i8042_SET_COMMAND 0x60
49#define i8042_COMMAND 0x69
[149d14e5]50#define i8042_CPU_RESET 0xfe
[3c79afe]51
52#define i8042_BUFFER_FULL_MASK 0x01
53#define i8042_WAIT_MASK 0x02
[607c5f9]54
[1adbf90]55#define i8042_TIMEOUT 65536
56
[c9b550b]57static irq_ownership_t i8042_claim(irq_t *irq)
[41d33ac]58{
[c9b550b]59 i8042_instance_t *i8042_instance = irq->instance;
[4544884]60 i8042_t *dev = i8042_instance->i8042;
[a35b458]61
[4544884]62 if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
63 return IRQ_ACCEPT;
64 else
65 return IRQ_DECLINE;
[cea12e9]66}
[41d33ac]67
[6cd9aa6]68static void i8042_irq_handler(irq_t *irq)
[cea12e9]69{
[4544884]70 i8042_instance_t *instance = irq->instance;
71 i8042_t *dev = instance->i8042;
[a35b458]72
[137691a]73 if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) {
[3c79afe]74 uint8_t data = pio_read_8(&dev->data);
[c2417bc]75 indev_push_character(instance->kbrdin, data);
[cea12e9]76 }
77}
[6ccb238]78
[d1582b50]79/** Clear input buffer. */
[c2417bc]80static void i8042_clear_buffer(i8042_t *dev)
81{
[1adbf90]82 for (uint32_t i = 0; i < i8042_TIMEOUT; i++) {
83 if ((pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) == 0)
84 break;
[a35b458]85
[c2417bc]86 (void) pio_read_8(&dev->data);
[1adbf90]87 delay(50); /* 50 us think time */
88 }
89}
90
91static void i8042_send_command(i8042_t *dev, uint8_t cmd)
92{
93 for (uint32_t i = 0; i < i8042_TIMEOUT; i++) {
94 if ((pio_read_8(&dev->status) & i8042_WAIT_MASK) == 0)
95 break;
[a35b458]96
[1adbf90]97 delay(50); /* 50 us think time */
98 }
[a35b458]99
[1adbf90]100 pio_write_8(&dev->status, cmd);
101 delay(10000); /* 10 ms think time */
[c2417bc]102}
103
[cea12e9]104/** Initialize i8042. */
[c2417bc]105i8042_instance_t *i8042_init(i8042_t *dev, inr_t inr)
[cea12e9]106{
[1adbf90]107 i8042_instance_t *instance =
[11b285d]108 malloc(sizeof(i8042_instance_t));
[c2417bc]109 if (instance) {
110 instance->i8042 = dev;
111 instance->kbrdin = NULL;
[a35b458]112
[c2417bc]113 irq_initialize(&instance->irq);
114 instance->irq.inr = inr;
115 instance->irq.claim = i8042_claim;
116 instance->irq.handler = i8042_irq_handler;
117 instance->irq.instance = instance;
118 }
[a35b458]119
[c2417bc]120 return instance;
121}
122
123void i8042_wire(i8042_instance_t *instance, indev_t *kbrdin)
124{
[63e27ef]125 assert(instance);
126 assert(kbrdin);
[a35b458]127
[1adbf90]128 i8042_clear_buffer(instance->i8042);
[a35b458]129
[c2417bc]130 instance->kbrdin = kbrdin;
[5b0ae4be]131 irq_register(&instance->irq);
[30ab05f]132}
133
[149d14e5]134/* Reset CPU by pulsing pin 0 */
135void i8042_cpu_reset(i8042_t *dev)
136{
137 interrupts_disable();
[c2417bc]138 i8042_clear_buffer(dev);
[1adbf90]139 i8042_send_command(dev, i8042_CPU_RESET);
[149d14e5]140}
141
[3c5006a0]142/** @}
[b45c443]143 */
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