[f761f1eb] | 1 | /*
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[4c7257b] | 2 | * Copyright (c) 2009 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[6404aca] | 29 | /** @addtogroup kernel_genarch
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[b45c443] | 30 | * @{
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| 31 | */
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[3c5006a0] | 32 | /**
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[cc73a8a1] | 33 | * @file
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[3c79afe] | 34 | * @brief i8042 processor driver
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[3c5006a0] | 35 | *
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[411b6a6] | 36 | * It takes care of the i8042 serial communication.
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[c8bf88d] | 37 | *
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[b45c443] | 38 | */
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| 39 |
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[63e27ef] | 40 | #include <assert.h>
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[411b6a6] | 41 | #include <genarch/drivers/i8042/i8042.h>
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[91825d90] | 42 | #include <genarch/drivers/legacy/ia32/io.h>
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[f761f1eb] | 43 | #include <arch/asm.h>
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[607c5f9] | 44 | #include <console/chardev.h>
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[aafed15] | 45 | #include <stdlib.h>
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[1adbf90] | 46 | #include <time/delay.h>
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[6ccb238] | 47 |
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[3c79afe] | 48 | #define i8042_SET_COMMAND 0x60
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| 49 | #define i8042_COMMAND 0x69
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[149d14e5] | 50 | #define i8042_CPU_RESET 0xfe
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[3c79afe] | 51 |
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| 52 | #define i8042_BUFFER_FULL_MASK 0x01
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| 53 | #define i8042_WAIT_MASK 0x02
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[607c5f9] | 54 |
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[1adbf90] | 55 | #define i8042_TIMEOUT 65536
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| 56 |
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[c9b550b] | 57 | static irq_ownership_t i8042_claim(irq_t *irq)
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[41d33ac] | 58 | {
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[c9b550b] | 59 | i8042_instance_t *i8042_instance = irq->instance;
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[4544884] | 60 | i8042_t *dev = i8042_instance->i8042;
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[a35b458] | 61 |
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[4544884] | 62 | if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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| 63 | return IRQ_ACCEPT;
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| 64 | else
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| 65 | return IRQ_DECLINE;
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[cea12e9] | 66 | }
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[41d33ac] | 67 |
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[6cd9aa6] | 68 | static void i8042_irq_handler(irq_t *irq)
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[cea12e9] | 69 | {
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[4544884] | 70 | i8042_instance_t *instance = irq->instance;
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| 71 | i8042_t *dev = instance->i8042;
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[a35b458] | 72 |
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[137691a] | 73 | if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) {
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[3c79afe] | 74 | uint8_t data = pio_read_8(&dev->data);
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[c2417bc] | 75 | indev_push_character(instance->kbrdin, data);
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[cea12e9] | 76 | }
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| 77 | }
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[6ccb238] | 78 |
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[d1582b50] | 79 | /** Clear input buffer. */
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[c2417bc] | 80 | static void i8042_clear_buffer(i8042_t *dev)
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| 81 | {
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[1adbf90] | 82 | for (uint32_t i = 0; i < i8042_TIMEOUT; i++) {
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| 83 | if ((pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK) == 0)
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| 84 | break;
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[a35b458] | 85 |
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[c2417bc] | 86 | (void) pio_read_8(&dev->data);
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[1adbf90] | 87 | delay(50); /* 50 us think time */
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| 88 | }
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| 89 | }
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| 90 |
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| 91 | static void i8042_send_command(i8042_t *dev, uint8_t cmd)
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| 92 | {
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| 93 | for (uint32_t i = 0; i < i8042_TIMEOUT; i++) {
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| 94 | if ((pio_read_8(&dev->status) & i8042_WAIT_MASK) == 0)
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| 95 | break;
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[a35b458] | 96 |
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[1adbf90] | 97 | delay(50); /* 50 us think time */
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| 98 | }
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[a35b458] | 99 |
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[1adbf90] | 100 | pio_write_8(&dev->status, cmd);
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| 101 | delay(10000); /* 10 ms think time */
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[c2417bc] | 102 | }
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| 103 |
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[cea12e9] | 104 | /** Initialize i8042. */
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[c2417bc] | 105 | i8042_instance_t *i8042_init(i8042_t *dev, inr_t inr)
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[cea12e9] | 106 | {
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[1adbf90] | 107 | i8042_instance_t *instance =
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[11b285d] | 108 | malloc(sizeof(i8042_instance_t));
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[c2417bc] | 109 | if (instance) {
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| 110 | instance->i8042 = dev;
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| 111 | instance->kbrdin = NULL;
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[a35b458] | 112 |
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[c2417bc] | 113 | irq_initialize(&instance->irq);
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| 114 | instance->irq.inr = inr;
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| 115 | instance->irq.claim = i8042_claim;
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| 116 | instance->irq.handler = i8042_irq_handler;
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| 117 | instance->irq.instance = instance;
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| 118 | }
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[a35b458] | 119 |
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[c2417bc] | 120 | return instance;
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| 121 | }
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| 122 |
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| 123 | void i8042_wire(i8042_instance_t *instance, indev_t *kbrdin)
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| 124 | {
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[63e27ef] | 125 | assert(instance);
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| 126 | assert(kbrdin);
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[a35b458] | 127 |
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[1adbf90] | 128 | i8042_clear_buffer(instance->i8042);
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[a35b458] | 129 |
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[c2417bc] | 130 | instance->kbrdin = kbrdin;
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[5b0ae4be] | 131 | irq_register(&instance->irq);
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[30ab05f] | 132 | }
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| 133 |
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[149d14e5] | 134 | /* Reset CPU by pulsing pin 0 */
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| 135 | void i8042_cpu_reset(i8042_t *dev)
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| 136 | {
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| 137 | interrupts_disable();
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[c2417bc] | 138 | i8042_clear_buffer(dev);
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[1adbf90] | 139 | i8042_send_command(dev, i8042_CPU_RESET);
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[149d14e5] | 140 | }
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| 141 |
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[3c5006a0] | 142 | /** @}
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[b45c443] | 143 | */
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