| 1 | /*
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| 2 | * Copyright (c) 2012 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 | /** @addtogroup genarch
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| 29 | * @{
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| 30 | */
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| 31 | /**
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| 32 | * @file
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| 33 | * @brief Texas Instruments AMDM37x on-chip uart serial line driver.
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| 34 | */
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| 35 |
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| 36 | #include <genarch/drivers/amdm37x_uart/amdm37x_uart.h>
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| 37 | #include <str.h>
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| 38 | #include <mm/km.h>
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| 39 |
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| 40 | static void amdm37x_uart_txb(amdm37x_uart_t *uart, uint8_t b)
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| 41 | {
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| 42 | /* Wait for buffer */
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| 43 | while (uart->regs->ssr & AMDM37x_UART_SSR_TX_FIFO_FULL_FLAG);
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| 44 | /* Write to the outgoing fifo */
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| 45 | uart->regs->thr = b;
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| 46 | }
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| 47 |
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| 48 | static void amdm37x_uart_putchar(outdev_t *dev, wchar_t ch)
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| 49 | {
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| 50 | amdm37x_uart_t *uart = dev->data;
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| 51 | if (!ascii_check(ch)) {
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| 52 | amdm37x_uart_txb(uart, U_SPECIAL);
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| 53 | } else {
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| 54 | if (ch == '\n')
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| 55 | amdm37x_uart_txb(uart, '\r');
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| 56 | amdm37x_uart_txb(uart, ch);
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| 57 | }
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| 58 | }
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| 59 |
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| 60 | static outdev_operations_t amdm37x_uart_ops = {
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| 61 | .redraw = NULL,
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| 62 | .write = amdm37x_uart_putchar,
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| 63 | };
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| 64 |
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| 65 | bool amdm37x_uart_init(
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| 66 | amdm37x_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
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| 67 | {
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| 68 | ASSERT(uart);
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| 69 | uart->regs = (void *)km_map(addr, size, PAGE_NOT_CACHEABLE);
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| 70 |
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| 71 | /* See TI OMAP35X TRM ch 17.5.1.1 p. 2732 for startup routine */
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| 72 |
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| 73 | /* Soft reset the port */
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| 74 | uart->regs->sysc = AMDM37x_UART_SYSC_SOFTRESET_FLAG;
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| 75 | while (uart->regs->syss & AMDM37x_UART_SYSS_RESETDONE_FLAG) ;
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| 76 |
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| 77 | /* Enable access to EFR register */
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| 78 | const uint8_t lcr = uart->regs->lcr; /* Save old value */
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| 79 | uart->regs->lcr = 0xbf; /* Sets config mode B */
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| 80 |
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| 81 | /* Enable access to TCL_TLR register */
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| 82 | const bool enhanced = uart->regs->efr & AMDM37x_UART_EFR_ENH_FLAG;
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| 83 | uart->regs->efr |= AMDM37x_UART_EFR_ENH_FLAG; /* Turn on enh. */
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| 84 | uart->regs->lcr = 0x80; /* Config mode A */
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| 85 |
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| 86 | /* Set default (val 0) triggers, disable DMA enable FIFOs */
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| 87 | const bool tcl_tlr = uart->regs->mcr & AMDM37x_UART_MCR_TCR_TLR_FLAG;
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| 88 | uart->regs->fcr = AMDM37x_UART_FCR_FIFO_EN_FLAG;
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| 89 |
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| 90 | /* Enable fine granularity for rx trigger */
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| 91 | uart->regs->lcr = 0xbf; /* Sets config mode B */
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| 92 | uart->regs->scr = AMDM37x_UART_SCR_RX_TRIG_GRANU1_FLAG;
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| 93 |
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| 94 | /* Restore enhanced */
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| 95 | if (!enhanced)
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| 96 | uart->regs->efr &= ~AMDM37x_UART_EFR_ENH_FLAG;
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| 97 |
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| 98 | uart->regs->lcr = 0x80; /* Config mode A */
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| 99 | /* Restore tcl_lcr */
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| 100 | if (!tcl_tlr)
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| 101 | uart->regs->mcr &= ~AMDM37x_UART_MCR_TCR_TLR_FLAG;
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| 102 |
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| 103 | /* Restore tcl_lcr */
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| 104 | uart->regs->lcr = lcr;
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| 105 |
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| 106 | /* Disable interrupts */
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| 107 | uart->regs->ier = 0;
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| 108 |
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| 109 | /* Setup outdev */
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| 110 | outdev_initialize("amdm37x_uart_dev", &uart->outdev, &amdm37x_uart_ops);
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| 111 | uart->outdev.data = uart;
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| 112 | return false;
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| 113 | }
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| 114 |
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| 115 | void amdm37x_uart_input_wire(amdm37x_uart_t *uart, indev_t *indev)
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| 116 | {
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| 117 | // TODO implement
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| 118 | // register interrupt
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| 119 | // set rx fifo
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| 120 | // set rx fifo threshold to 1
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| 121 | }
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| 122 |
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| 123 | /**
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| 124 | * @}
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| 125 | */
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