source: mainline/kernel/genarch/src/drivers/am335x/uart.c@ f09f059

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f09f059 was d1cf4dc, checked in by Maurizio Lombardi <m.lombardi85@…>, 13 years ago

am335x: Fix UART initialization

  • Property mode set to 100644
File size: 5.3 KB
Line 
1/*
2 * Copyright (c) 2012 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup genarch
29 * @{
30 */
31/**
32 * @file
33 * @brief Texas Instruments AM335x on-chip uart serial line driver.
34 */
35
36#include <genarch/drivers/am335x/uart.h>
37#include <ddi/device.h>
38#include <str.h>
39#include <mm/km.h>
40
41static void am335x_uart_txb(am335x_uart_t *uart, uint8_t b)
42{
43 /* Wait for buffer */
44 while (uart->regs->ssr & AM335x_UART_SSR_TX_FIFO_FULL_FLAG);
45 /* Write to the outgoing fifo */
46 uart->regs->thr = b;
47}
48
49static void am335x_uart_putchar(outdev_t *dev, wchar_t ch)
50{
51 am335x_uart_t *uart = dev->data;
52 if (!ascii_check(ch)) {
53 am335x_uart_txb(uart, U_SPECIAL);
54 } else {
55 if (ch == '\n')
56 am335x_uart_txb(uart, '\r');
57 am335x_uart_txb(uart, ch);
58 }
59}
60
61static outdev_operations_t am335x_uart_ops = {
62 .redraw = NULL,
63 .write = am335x_uart_putchar,
64};
65
66static irq_ownership_t am335x_uart_claim(irq_t *irq)
67{
68 return IRQ_ACCEPT;
69}
70
71static void am335x_uart_handler(irq_t *irq)
72{
73 am335x_uart_t *uart = irq->instance;
74 while ((uart->regs->rx_fifo_lvl)) {
75 const uint8_t val = uart->regs->rhr;
76 if (uart->indev && val) {
77 indev_push_character(uart->indev, val);
78 }
79 }
80}
81
82bool am335x_uart_init(
83 am335x_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
84{
85 ASSERT(uart);
86 uart->regs = (void *)km_map(addr, size, PAGE_NOT_CACHEABLE);
87
88 ASSERT(uart->regs);
89
90 /* Soft reset the port */
91 uart->regs->sysc = AM335x_UART_SYSC_SOFTRESET_FLAG;
92 while (!(uart->regs->syss & AM335x_UART_SYSS_RESETDONE_FLAG));
93
94 /* Disable the UART module */
95 uart->regs->mdr1 |= AM335x_UART_MDR_MS_DISABLE;
96
97 /* Enable access to EFR register */
98 uart->regs->lcr = 0xbf; /* Sets config mode B */
99
100 /* Enable access to TCL_TLR register */
101 const bool enhanced = uart->regs->efr & AM335x_UART_EFR_ENH_FLAG;
102 uart->regs->efr |= AM335x_UART_EFR_ENH_FLAG; /* Turn on enh. */
103 uart->regs->lcr = 0x80; /* Config mode A */
104
105 /* Set default (val 0) triggers, disable DMA enable FIFOs */
106 const bool tcl_tlr = uart->regs->mcr & AM335x_UART_MCR_TCR_TLR_FLAG;
107 /* Enable access to tcr and tlr registers */
108 uart->regs->mcr |= AM335x_UART_MCR_TCR_TLR_FLAG;
109
110 /* Enable FIFOs */
111 uart->regs->fcr = AM335x_UART_FCR_FIFO_EN_FLAG;
112
113 /* Enable fine granularity for RX FIFO and set trigger level to 1,
114 * TX FIFO, trigger level is irrelevant*/
115 uart->regs->lcr = 0xBF; /* Sets config mode B */
116 uart->regs->scr = AM335x_UART_SCR_RX_TRIG_GRANU1_FLAG;
117 uart->regs->tlr = 1 << AM335x_UART_TLR_RX_FIFO_TRIG_SHIFT;
118
119 /* Sets config mode A */
120 uart->regs->lcr = 0x80;
121 /* Restore tcl_tlr access flag */
122 if (!tcl_tlr)
123 uart->regs->mcr &= ~AM335x_UART_MCR_TCR_TLR_FLAG;
124 /* Sets config mode B */
125 uart->regs->lcr = 0xBF;
126
127 /* Set the divisor value to get a baud rate of 115200 bps */
128 uart->regs->dll = 0x1A;
129 uart->regs->dlh = 0x00;
130
131 /* Restore enhanced */
132 if (!enhanced)
133 uart->regs->efr &= ~AM335x_UART_EFR_ENH_FLAG;
134
135 /* Set the DIV_EN bit to 0 */
136 uart->regs->lcr &= ~AM335x_UART_LCR_DIV_EN_FLAG;
137 /* Set the BREAK_EN bit to 0 */
138 uart->regs->lcr &= ~AM335x_UART_LCR_BREAK_EN_FLAG;
139 /* No parity */
140 uart->regs->lcr &= ~AM335x_UART_LCR_PARITY_EN_FLAG;
141 /* Stop = 1 bit */
142 uart->regs->lcr &= ~AM335x_UART_LCR_NB_STOP_FLAG;
143 /* Char length = 8 bits */
144 uart->regs->lcr |= AM335x_UART_LCR_CHAR_LENGTH_8BITS;
145
146 /* Enable the UART module */
147 uart->regs->mdr1 &= AM335x_UART_MDR_MS_UART16;
148
149 /* Disable interrupts */
150 uart->regs->ier = 0;
151
152 /* Setup outdev */
153 outdev_initialize("am335x_uart_dev", &uart->outdev, &am335x_uart_ops);
154 uart->outdev.data = uart;
155
156 /* Initialize IRQ */
157 irq_initialize(&uart->irq);
158 uart->irq.devno = device_assign_devno();
159 uart->irq.inr = interrupt;
160 uart->irq.claim = am335x_uart_claim;
161 uart->irq.handler = am335x_uart_handler;
162 uart->irq.instance = uart;
163
164 return true;
165}
166
167void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev)
168{
169 ASSERT(uart);
170 /* Set indev */
171 uart->indev = indev;
172 /* Register interrupt. */
173 irq_register(&uart->irq);
174 /* Enable interrupt on receive */
175 uart->regs->ier |= AM335x_UART_IER_RHR_IRQ_FLAG;
176}
177
178/**
179 * @}
180 */
181
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