[42f2a45] | 1 | /*
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| 2 | * Copyright (c) 2012 Maurizio Lombardi
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 | /** @addtogroup genarch
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| 29 | * @{
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| 30 | */
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| 31 | /**
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| 32 | * @file
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| 33 | * @brief Texas Instruments AM335x timer driver.
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| 34 | */
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| 35 |
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| 36 | #include <genarch/drivers/am335x/timer.h>
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| 37 | #include <mm/km.h>
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| 38 | #include <errno.h>
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| 39 |
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| 40 |
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| 41 | typedef struct timer_regs_mmap {
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| 42 | uintptr_t base;
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| 43 | size_t size;
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| 44 | } timer_regs_mmap_t;
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| 45 |
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| 46 | static const timer_regs_mmap_t regs_map[TIMERS_MAX] = {
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| 47 | { .base = AM335x_DMTIMER0_BASE_ADDRESS, .size = AM335x_DMTIMER0_SIZE },
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| 48 | {0, 0},
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| 49 | { .base = AM335x_DMTIMER2_BASE_ADDRESS, .size = AM335x_DMTIMER2_SIZE },
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| 50 | { .base = AM335x_DMTIMER3_BASE_ADDRESS, .size = AM335x_DMTIMER3_SIZE },
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| 51 | { .base = AM335x_DMTIMER4_BASE_ADDRESS, .size = AM335x_DMTIMER4_SIZE },
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| 52 | { .base = AM335x_DMTIMER5_BASE_ADDRESS, .size = AM335x_DMTIMER5_SIZE },
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| 53 | { .base = AM335x_DMTIMER6_BASE_ADDRESS, .size = AM335x_DMTIMER6_SIZE },
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| 54 | { .base = AM335x_DMTIMER7_BASE_ADDRESS, .size = AM335x_DMTIMER7_SIZE },
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| 55 | };
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| 56 |
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| 57 | void
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| 58 | am335x_timer_init(am335x_timer_t *timer, am335x_timer_id_t id, unsigned hz)
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| 59 | {
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| 60 | uintptr_t base_addr;
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| 61 | size_t size;
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| 62 |
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| 63 | ASSERT(id < TIMERS_MAX);
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| 64 |
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| 65 | if (id == DMTIMER1_1MS)
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| 66 | return; /* Not supported yet */
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| 67 |
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| 68 | base_addr = regs_map[id].base;
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| 69 | size = regs_map[id].size;
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| 70 |
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| 71 | timer->regs = (void *) km_map(base_addr, size, PAGE_NOT_CACHEABLE);
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| 72 | timer->id = id;
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| 73 |
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| 74 | am335x_timer_regs_t *regs = timer->regs;
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| 75 |
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| 76 | /* Stop the timer */
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| 77 | am335x_timer_stop(timer);
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| 78 |
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| 79 | /* Perform a soft reset */
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| 80 | am335x_timer_reset(timer);
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| 81 |
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| 82 | /* Disable the prescaler */
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| 83 | regs->tclr &= ~AM335x_TIMER_TCLR_PRE_FLAG;
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| 84 |
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| 85 | /* Enable auto-reload mode */
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| 86 | regs->tclr |= AM335x_TIMER_TCLR_AR_FLAG;
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| 87 |
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| 88 | /* XXX Here we assume that the timer clock source
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| 89 | * is running at 32 Khz but this is not always the
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| 90 | * case; DMTIMER[2 - 7] can use the internal system 24 Mhz
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| 91 | * clock source or an external clock also.
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| 92 | */
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| 93 | unsigned const count = 0xFFFFFFFE - 32768 / hz;
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| 94 | regs->tcrr = count;
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| 95 | regs->tldr = count;
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| 96 | }
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| 97 |
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| 98 | void
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| 99 | am335x_timer_intr_ack(am335x_timer_t *timer)
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| 100 | {
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| 101 | /* Clear pending OVF event */
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| 102 | timer->regs->irqstatus |= AM335x_TIMER_IRQSTATUS_OVF_FLAG;
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| 103 | }
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| 104 |
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| 105 | void
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| 106 | am335x_timer_reset(am335x_timer_t *timer)
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| 107 | {
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| 108 | /* Initiate soft reset */
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| 109 | timer->regs->tiocp_cfg |= AM335x_TIMER_TIOCPCFG_SOFTRESET_FLAG;
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| 110 | /* Wait until the reset is done */
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| 111 | while (timer->regs->tiocp_cfg & AM335x_TIMER_TIOCPCFG_SOFTRESET_FLAG);
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| 112 | }
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| 113 |
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| 114 | void
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| 115 | am335x_timer_stop(am335x_timer_t *timer)
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| 116 | {
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| 117 | /* Disable the interrupt */
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| 118 | timer->regs->irqenable_clr |= AM335x_TIMER_IRQENABLE_CLR_OVF_FLAG;
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| 119 | /* Stop the timer */
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| 120 | timer->regs->tclr &= ~AM335x_TIMER_TCLR_ST_FLAG;
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| 121 | }
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| 122 |
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| 123 | void
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| 124 | am335x_timer_start(am335x_timer_t *timer)
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| 125 | {
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| 126 | /* Enable the interrupt */
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| 127 | timer->regs->irqenable_set |= AM335x_TIMER_IRQENABLE_SET_OVF_FLAG;
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| 128 | /* Start the clock */
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| 129 | timer->regs->tclr |= AM335x_TIMER_TCLR_ST_FLAG;
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| 130 | }
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| 131 |
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| 132 | /**
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| 133 | * @}
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| 134 | */
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| 135 |
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