source: mainline/kernel/genarch/src/acpi/madt.c@ 91d6d28

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 91d6d28 was 06e1e95, checked in by Jakub Jermar <jakub@…>, 19 years ago

C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.

  • Property mode set to 100644
File size: 7.1 KB
RevLine 
[10a2e22]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup genarch
[b45c443]30 * @{
31 */
[0f27b4c]32/**
[7257021e]33 * @file
[0f27b4c]34 * @brief Multiple APIC Description Table (MADT) parsing.
35 */
36
[ed0dd65]37#include <arch/types.h>
[232e3ec7]38#include <typedefs.h>
[e16e036a]39#include <genarch/acpi/acpi.h>
40#include <genarch/acpi/madt.h>
[ed0dd65]41#include <arch/smp/apic.h>
[232e3ec7]42#include <arch/smp/smp.h>
[6b7c36f]43#include <panic.h>
[232e3ec7]44#include <debug.h>
45#include <config.h>
[9c0a9b3]46#include <print.h>
[085d973]47#include <mm/slab.h>
[50a4e25]48#include <memstr.h>
[8491c48]49#include <sort.h>
[10a2e22]50
51struct acpi_madt *acpi_madt = NULL;
[ed0dd65]52
[5f85c91]53#ifdef CONFIG_SMP
[ed0dd65]54
[a83a802]55/** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
56int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
57
[7f1c620]58static void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index);
59static void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index);
60static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index);
[8491c48]61static int madt_cmp(void * a, void * b);
[6b7c36f]62
63struct madt_l_apic *madt_l_apic_entries = NULL;
64struct madt_io_apic *madt_io_apic_entries = NULL;
65
[74b2f5bf]66index_t madt_l_apic_entry_index = 0;
67index_t madt_io_apic_entry_index = 0;
68count_t madt_l_apic_entry_cnt = 0;
69count_t madt_io_apic_entry_cnt = 0;
70count_t cpu_count = 0;
[6b7c36f]71
[50a4e25]72struct madt_apic_header * * madt_entries_index = NULL;
73int madt_entries_index_cnt = 0;
74
[ed0dd65]75char *entry[] = {
76 "L_APIC",
77 "IO_APIC",
78 "INTR_SRC_OVRD",
79 "NMI_SRC",
80 "L_APIC_NMI",
81 "L_APIC_ADDR_OVRD",
82 "IO_SAPIC",
83 "L_SAPIC",
84 "PLATFORM_INTR_SRC"
85};
86
[232e3ec7]87/*
88 * ACPI MADT Implementation of SMP configuration interface.
89 */
90static count_t madt_cpu_count(void);
91static bool madt_cpu_enabled(index_t i);
92static bool madt_cpu_bootstrap(index_t i);
[7f1c620]93static uint8_t madt_cpu_apic_id(index_t i);
[a83a802]94static int madt_irq_to_pin(int irq);
[232e3ec7]95
96struct smp_config_operations madt_config_operations = {
97 .cpu_count = madt_cpu_count,
98 .cpu_enabled = madt_cpu_enabled,
99 .cpu_bootstrap = madt_cpu_bootstrap,
[a83a802]100 .cpu_apic_id = madt_cpu_apic_id,
101 .irq_to_pin = madt_irq_to_pin
[232e3ec7]102};
103
[a83a802]104count_t madt_cpu_count(void)
[232e3ec7]105{
106 return madt_l_apic_entry_cnt;
107}
108
[a83a802]109bool madt_cpu_enabled(index_t i)
[232e3ec7]110{
111 ASSERT(i < madt_l_apic_entry_cnt);
[50a4e25]112 return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
113
[232e3ec7]114}
115
[a83a802]116bool madt_cpu_bootstrap(index_t i)
[232e3ec7]117{
118 ASSERT(i < madt_l_apic_entry_cnt);
[50a4e25]119 return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
[232e3ec7]120}
121
[7f1c620]122uint8_t madt_cpu_apic_id(index_t i)
[232e3ec7]123{
124 ASSERT(i < madt_l_apic_entry_cnt);
[50a4e25]125 return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
[232e3ec7]126}
127
[a83a802]128int madt_irq_to_pin(int irq)
129{
130 ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));
131 return isa_irq_map[irq];
132}
133
[8491c48]134int madt_cmp(void * a, void * b)
135{
[01e48c1]136 return
137 (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ?
138 1 :
139 ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0);
[8491c48]140}
141
[ed0dd65]142void acpi_madt_parse(void)
143{
[7f1c620]144 struct madt_apic_header *end = (struct madt_apic_header *) (((uint8_t *) acpi_madt) + acpi_madt->header.length);
[50a4e25]145 struct madt_apic_header *h;
[2cd073bd]146
[7f1c620]147 l_apic = (uint32_t *) (unative_t) acpi_madt->l_apic_address;
[50a4e25]148
149 /* calculate madt entries */
[7f1c620]150 for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((uint8_t *) h) + h->length)) {
[50a4e25]151 madt_entries_index_cnt++;
152 }
153
154 /* create madt apic entries index array */
[bb68433]155 madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
156 if (!madt_entries_index)
157 panic("Memory allocation error.");
[50a4e25]158
[7f1c620]159 uint32_t index = 0;
[6b7c36f]160
[7f1c620]161 for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((uint8_t *) h) + h->length)) {
[50a4e25]162 madt_entries_index[index++] = h;
163 }
[ed0dd65]164
[8491c48]165 /* Quicksort MADT index structure */
[7f1c620]166 qsort(madt_entries_index, madt_entries_index_cnt, sizeof(uintptr_t), &madt_cmp);
[50a4e25]167
168 /* Parse MADT entries */
169 for (index = 0; index < madt_entries_index_cnt - 1; index++) {
170 h = madt_entries_index[index];
[ed0dd65]171 switch (h->type) {
172 case MADT_L_APIC:
[50a4e25]173 madt_l_apic_entry((struct madt_l_apic *) h, index);
[6b7c36f]174 break;
[ed0dd65]175 case MADT_IO_APIC:
[50a4e25]176 madt_io_apic_entry((struct madt_io_apic *) h, index);
[6b7c36f]177 break;
[ed0dd65]178 case MADT_INTR_SRC_OVRD:
[a83a802]179 madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
180 break;
[ed0dd65]181 case MADT_NMI_SRC:
182 case MADT_L_APIC_NMI:
183 case MADT_L_APIC_ADDR_OVRD:
184 case MADT_IO_SAPIC:
185 case MADT_L_SAPIC:
186 case MADT_PLATFORM_INTR_SRC:
[280a27e]187 printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type);
[ed0dd65]188 break;
189
190 default:
191 if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
[280a27e]192 printf("MADT: skipping reserved entry (type=%zd)\n", h->type);
[ed0dd65]193 }
194 if (h->type >= MADT_RESERVED_OEM_BEGIN) {
[280a27e]195 printf("MADT: skipping OEM entry (type=%zd)\n", h->type);
[ed0dd65]196 }
197 break;
198 }
[50a4e25]199
200
[ed0dd65]201 }
[50a4e25]202
[ed0dd65]203
[74b2f5bf]204 if (cpu_count)
205 config.cpu_count = cpu_count;
[ed0dd65]206}
[6b7c36f]207
208
[7f1c620]209void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index)
[50a4e25]210{
211 if (!madt_l_apic_entry_cnt++) {
212 madt_l_apic_entry_index = index;
213 }
[6b7c36f]214
215 if (!(la->flags & 0x1)) {
216 /* Processor is unusable, skip it. */
217 return;
218 }
[74b2f5bf]219
220 cpu_count++;
[6b7c36f]221 apic_id_mask |= 1<<la->apic_id;
222}
223
[7f1c620]224void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index)
[6b7c36f]225{
226 if (!madt_io_apic_entry_cnt++) {
[50a4e25]227 /* remember index of the first io apic entry */
228 madt_io_apic_entry_index = index;
[7f1c620]229 io_apic = (uint32_t *) (unative_t) ioa->io_apic_address;
[50a4e25]230 } else {
[6b7c36f]231 /* currently not supported */
232 return;
233 }
234}
235
[7f1c620]236void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index)
[a83a802]237{
238 ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
[fbf7b4c]239 printf("MADT: ignoring %s entry: bus=%zd, source=%zd, global_int=%zd, flags=%#hx\n",
[9149135]240 entry[override->header.type], override->bus, override->source,
241 override->global_int, override->flags);
[a83a802]242}
[ed0dd65]243
[5f85c91]244#endif /* CONFIG_SMP */
[b45c443]245
[06e1e95]246/** @}
[b45c443]247 */
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