[10a2e22] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[10a2e22] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup genarch
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[b45c443] | 30 | * @{
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| 31 | */
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[0f27b4c] | 32 | /**
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[7257021e] | 33 | * @file
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[0f27b4c] | 34 | * @brief Multiple APIC Description Table (MADT) parsing.
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| 35 | */
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| 36 |
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[ed0dd65] | 37 | #include <arch/types.h>
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[e16e036a] | 38 | #include <genarch/acpi/acpi.h>
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| 39 | #include <genarch/acpi/madt.h>
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[ed0dd65] | 40 | #include <arch/smp/apic.h>
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[232e3ec7] | 41 | #include <arch/smp/smp.h>
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[6b7c36f] | 42 | #include <panic.h>
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[232e3ec7] | 43 | #include <debug.h>
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| 44 | #include <config.h>
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[9c0a9b3] | 45 | #include <print.h>
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[085d973] | 46 | #include <mm/slab.h>
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[50a4e25] | 47 | #include <memstr.h>
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[8491c48] | 48 | #include <sort.h>
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[10a2e22] | 49 |
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| 50 | struct acpi_madt *acpi_madt = NULL;
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[ed0dd65] | 51 |
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[5f85c91] | 52 | #ifdef CONFIG_SMP
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[ed0dd65] | 53 |
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[a83a802] | 54 | /** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
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| 55 | int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
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| 56 |
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[7f1c620] | 57 | static void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index);
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| 58 | static void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index);
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| 59 | static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index);
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[8491c48] | 60 | static int madt_cmp(void * a, void * b);
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[6b7c36f] | 61 |
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| 62 | struct madt_l_apic *madt_l_apic_entries = NULL;
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| 63 | struct madt_io_apic *madt_io_apic_entries = NULL;
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| 64 |
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[74b2f5bf] | 65 | index_t madt_l_apic_entry_index = 0;
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| 66 | index_t madt_io_apic_entry_index = 0;
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| 67 | count_t madt_l_apic_entry_cnt = 0;
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| 68 | count_t madt_io_apic_entry_cnt = 0;
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| 69 | count_t cpu_count = 0;
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[6b7c36f] | 70 |
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[50a4e25] | 71 | struct madt_apic_header * * madt_entries_index = NULL;
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[623b49f1] | 72 | unsigned int madt_entries_index_cnt = 0;
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[50a4e25] | 73 |
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[ed0dd65] | 74 | char *entry[] = {
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| 75 | "L_APIC",
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| 76 | "IO_APIC",
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| 77 | "INTR_SRC_OVRD",
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| 78 | "NMI_SRC",
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| 79 | "L_APIC_NMI",
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| 80 | "L_APIC_ADDR_OVRD",
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| 81 | "IO_SAPIC",
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| 82 | "L_SAPIC",
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| 83 | "PLATFORM_INTR_SRC"
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| 84 | };
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| 85 |
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[232e3ec7] | 86 | /*
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| 87 | * ACPI MADT Implementation of SMP configuration interface.
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| 88 | */
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| 89 | static count_t madt_cpu_count(void);
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| 90 | static bool madt_cpu_enabled(index_t i);
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| 91 | static bool madt_cpu_bootstrap(index_t i);
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[7f1c620] | 92 | static uint8_t madt_cpu_apic_id(index_t i);
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[623b49f1] | 93 | static int madt_irq_to_pin(unsigned int irq);
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[232e3ec7] | 94 |
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| 95 | struct smp_config_operations madt_config_operations = {
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| 96 | .cpu_count = madt_cpu_count,
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| 97 | .cpu_enabled = madt_cpu_enabled,
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| 98 | .cpu_bootstrap = madt_cpu_bootstrap,
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[a83a802] | 99 | .cpu_apic_id = madt_cpu_apic_id,
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| 100 | .irq_to_pin = madt_irq_to_pin
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[232e3ec7] | 101 | };
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| 102 |
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[a83a802] | 103 | count_t madt_cpu_count(void)
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[232e3ec7] | 104 | {
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| 105 | return madt_l_apic_entry_cnt;
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| 106 | }
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| 107 |
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[a83a802] | 108 | bool madt_cpu_enabled(index_t i)
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[232e3ec7] | 109 | {
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| 110 | ASSERT(i < madt_l_apic_entry_cnt);
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[50a4e25] | 111 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
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| 112 |
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[232e3ec7] | 113 | }
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| 114 |
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[a83a802] | 115 | bool madt_cpu_bootstrap(index_t i)
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[232e3ec7] | 116 | {
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| 117 | ASSERT(i < madt_l_apic_entry_cnt);
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[50a4e25] | 118 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
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[232e3ec7] | 119 | }
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| 120 |
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[7f1c620] | 121 | uint8_t madt_cpu_apic_id(index_t i)
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[232e3ec7] | 122 | {
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| 123 | ASSERT(i < madt_l_apic_entry_cnt);
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[50a4e25] | 124 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
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[232e3ec7] | 125 | }
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| 126 |
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[623b49f1] | 127 | int madt_irq_to_pin(unsigned int irq)
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[a83a802] | 128 | {
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[f4c2b6a] | 129 | ASSERT(irq < sizeof(isa_irq_map) / sizeof(int));
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[a83a802] | 130 | return isa_irq_map[irq];
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| 131 | }
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| 132 |
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[8491c48] | 133 | int madt_cmp(void * a, void * b)
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| 134 | {
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[01e48c1] | 135 | return
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| 136 | (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ?
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| 137 | 1 :
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| 138 | ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0);
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[8491c48] | 139 | }
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| 140 |
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[ed0dd65] | 141 | void acpi_madt_parse(void)
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| 142 | {
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[7f1c620] | 143 | struct madt_apic_header *end = (struct madt_apic_header *) (((uint8_t *) acpi_madt) + acpi_madt->header.length);
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[50a4e25] | 144 | struct madt_apic_header *h;
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[2cd073bd] | 145 |
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[623b49f1] | 146 | l_apic = (uint32_t *) (unative_t) acpi_madt->l_apic_address;
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[50a4e25] | 147 |
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| 148 | /* calculate madt entries */
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[7f1c620] | 149 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((uint8_t *) h) + h->length)) {
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[50a4e25] | 150 | madt_entries_index_cnt++;
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| 151 | }
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| 152 |
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| 153 | /* create madt apic entries index array */
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[bb68433] | 154 | madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
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| 155 | if (!madt_entries_index)
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| 156 | panic("Memory allocation error.");
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[50a4e25] | 157 |
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[7f1c620] | 158 | uint32_t index = 0;
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[6b7c36f] | 159 |
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[7f1c620] | 160 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((uint8_t *) h) + h->length)) {
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[50a4e25] | 161 | madt_entries_index[index++] = h;
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| 162 | }
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[ed0dd65] | 163 |
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[8491c48] | 164 | /* Quicksort MADT index structure */
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[7f1c620] | 165 | qsort(madt_entries_index, madt_entries_index_cnt, sizeof(uintptr_t), &madt_cmp);
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[50a4e25] | 166 |
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[623b49f1] | 167 | /* Parse MADT entries */
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| 168 | if (madt_entries_index_cnt > 0) {
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| 169 | for (index = 0; index < madt_entries_index_cnt - 1; index++) {
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| 170 | h = madt_entries_index[index];
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| 171 | switch (h->type) {
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| 172 | case MADT_L_APIC:
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| 173 | madt_l_apic_entry((struct madt_l_apic *) h, index);
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| 174 | break;
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| 175 | case MADT_IO_APIC:
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| 176 | madt_io_apic_entry((struct madt_io_apic *) h, index);
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| 177 | break;
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| 178 | case MADT_INTR_SRC_OVRD:
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| 179 | madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
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| 180 | break;
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| 181 | case MADT_NMI_SRC:
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| 182 | case MADT_L_APIC_NMI:
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| 183 | case MADT_L_APIC_ADDR_OVRD:
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| 184 | case MADT_IO_SAPIC:
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| 185 | case MADT_L_SAPIC:
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| 186 | case MADT_PLATFORM_INTR_SRC:
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[f4c2b6a] | 187 | printf("MADT: skipping %s entry (type=%" PRIu8 ")\n", entry[h->type], h->type);
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[623b49f1] | 188 | break;
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[50a4e25] | 189 |
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[623b49f1] | 190 | default:
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| 191 | if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
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[f4c2b6a] | 192 | printf("MADT: skipping reserved entry (type=%" PRIu8 ")\n", h->type);
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[623b49f1] | 193 | }
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| 194 | if (h->type >= MADT_RESERVED_OEM_BEGIN) {
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[f4c2b6a] | 195 | printf("MADT: skipping OEM entry (type=%" PRIu8 ")\n", h->type);
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[623b49f1] | 196 | }
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| 197 | break;
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| 198 | }
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| 199 | }
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[ed0dd65] | 200 | }
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| 201 |
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[74b2f5bf] | 202 | if (cpu_count)
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| 203 | config.cpu_count = cpu_count;
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[ed0dd65] | 204 | }
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[6b7c36f] | 205 |
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| 206 |
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[7f1c620] | 207 | void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index)
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[50a4e25] | 208 | {
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| 209 | if (!madt_l_apic_entry_cnt++) {
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| 210 | madt_l_apic_entry_index = index;
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| 211 | }
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[6b7c36f] | 212 |
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| 213 | if (!(la->flags & 0x1)) {
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| 214 | /* Processor is unusable, skip it. */
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| 215 | return;
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| 216 | }
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[74b2f5bf] | 217 |
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| 218 | cpu_count++;
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[6b7c36f] | 219 | apic_id_mask |= 1<<la->apic_id;
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| 220 | }
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| 221 |
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[7f1c620] | 222 | void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index)
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[6b7c36f] | 223 | {
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| 224 | if (!madt_io_apic_entry_cnt++) {
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[50a4e25] | 225 | /* remember index of the first io apic entry */
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| 226 | madt_io_apic_entry_index = index;
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[7f1c620] | 227 | io_apic = (uint32_t *) (unative_t) ioa->io_apic_address;
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[50a4e25] | 228 | } else {
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[6b7c36f] | 229 | /* currently not supported */
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| 230 | return;
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| 231 | }
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| 232 | }
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| 233 |
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[7f1c620] | 234 | void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index)
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[a83a802] | 235 | {
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[f4c2b6a] | 236 | ASSERT(override->source < sizeof(isa_irq_map) / sizeof(int));
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| 237 | printf("MADT: ignoring %s entry: bus=%" PRIu8 ", source=%" PRIu8 ", global_int=%" PRIu32 ", flags=%#" PRIx16 "\n",
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[9149135] | 238 | entry[override->header.type], override->bus, override->source,
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| 239 | override->global_int, override->flags);
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[a83a802] | 240 | }
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[ed0dd65] | 241 |
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[5f85c91] | 242 | #endif /* CONFIG_SMP */
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[b45c443] | 243 |
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[06e1e95] | 244 | /** @}
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[b45c443] | 245 | */
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