| 1 | /*
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| 2 | * Copyright (c) 2012 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup genarch
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| 30 | * @{
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| 31 | */
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| 32 | /**
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| 33 | * @file
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| 34 | * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver.
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| 35 | */
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| 36 |
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| 37 | #ifndef KERN_ARM926_UART_H_
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| 38 | #define KERN_ARM926_UART_H_
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| 39 |
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| 40 | #include <ddi/irq.h>
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| 41 | #include <console/chardev.h>
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| 42 | #include <typedefs.h>
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| 43 |
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| 44 |
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| 45 | /** ARM926 User Guide ch. 4.8.5 (p. 106 in the pdf) */
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| 46 | #define ARM926_UART0_BASE_ADDRESS 0x16000000
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| 47 | #define ARM926_UART1_BASE_ADDRESS 0x16000000
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| 48 |
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| 49 | /** ARM926 User Guide ch. A.1 (p. 124 in the pdf) */
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| 50 | #define ARM926_UART0_IRQ 1
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| 51 | #define ARM926_UART1_IRQ 2
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| 52 |
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| 53 | /** PrimeCell UART TRM ch. 3.3 (p. 49 in the pdf) */
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| 54 | typedef struct {
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| 55 | /** UART data register */
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| 56 | ioport32_t data;
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| 57 | #define ARM926_UART_DATA_DATA_MASK 0xff
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| 58 | #define ARM926_UART_DATA_FE_FLAG (1 << 7)
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| 59 | #define ARM926_UART_DATA_PE_FLAG (1 << 9)
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| 60 | #define ARM926_UART_DATA_BE_FLAG (1 << 10)
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| 61 | #define ARM926_UART_DATA_OE_FLAG (1 << 11)
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| 62 |
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| 63 | union {
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| 64 | /* Same values that are in upper bits of data register*/
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| 65 | const ioport32_t status;
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| 66 | #define ARM926_UART_STATUS_FE_FLAG (1 << 0)
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| 67 | #define ARM926_UART_STATUS_PE_FLAG (1 << 1)
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| 68 | #define ARM926_UART_STATUS_BE_FLAG (1 << 2)
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| 69 | #define ARM926_UART_STATUS_OE_FLAG (1 << 3)
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| 70 | /* Writing anything clears all errors */
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| 71 | ioport32_t error_clear;
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| 72 | };
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| 73 | uint32_t padd0_[4];
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| 74 |
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| 75 | const ioport32_t flag;
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| 76 | #define ARM926_UART_FLAG_CTS_FLAG (1 << 0)
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| 77 | #define ARM926_UART_FLAG_DSR_FLAG (1 << 1)
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| 78 | #define ARM926_UART_FLAG_DCD_FLAG (1 << 2)
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| 79 | #define ARM926_UART_FLAG_BUSY_FLAG (1 << 3)
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| 80 | #define ARM926_UART_FLAG_RXFE_FLAG (1 << 4)
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| 81 | #define ARM926_UART_FLAG_TXFF_FLAG (1 << 5)
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| 82 | #define ARM926_UART_FLAG_RXFF_FLAG (1 << 6)
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| 83 | #define ARM926_UART_FLAG_TXFE_FLAG (1 << 7)
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| 84 | #define ARM926_UART_FLAG_RI_FLAG (1 << 8)
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| 85 | uint32_t padd1_;
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| 86 |
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| 87 | ioport32_t irda_low_power;
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| 88 | #define ARM926_UART_IRDA_LOW_POWER_MASK 0xff
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| 89 |
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| 90 | ioport32_t int_baud_divisor;
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| 91 | #define ARM926_UART_INT_BAUD_DIVISOR_MASK 0xffff
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| 92 |
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| 93 | ioport32_t fract_baud_divisor;
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| 94 | #define ARM926_UART_FRACT_BAUD_DIVISOR_MASK 0x1f
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| 95 |
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| 96 | ioport32_t line_control_high;
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| 97 | #define ARM926_UART_CONTROLHI_BRK_FLAG (1 << 0)
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| 98 | #define ARM926_UART_CONTROLHI_PEN_FLAG (1 << 1)
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| 99 | #define ARM926_UART_CONTROLHI_EPS_FLAG (1 << 2)
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| 100 | #define ARM926_UART_CONTROLHI_STP2_FLAG (1 << 3)
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| 101 | #define ARM926_UART_CONTROLHI_FEN_FLAG (1 << 4)
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| 102 | #define ARM926_UART_CONTROLHI_WLEN_MASK 0x3
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| 103 | #define ARM926_UART_CONTROLHI_WLEN_SHIFT 5
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| 104 | #define ARM926_UART_CONTROLHI_SPS_FLAG (1 << 5)
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| 105 |
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| 106 | ioport32_t control;
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| 107 | #define ARM926_UART_CONTROL_UARTEN_FLAG (1 << 0)
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| 108 | #define ARM926_UART_CONTROL_SIREN_FLAG (1 << 1)
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| 109 | #define ARM926_UART_CONTROL_SIRLP_FLAG (1 << 2)
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| 110 | #define ARM926_UART_CONTROL_LBE_FLAG (1 << 7)
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| 111 | #define ARM926_UART_CONTROL_TXE_FLAG (1 << 8)
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| 112 | #define ARM926_UART_CONTROL_RXE_FLAG (1 << 9)
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| 113 | #define ARM926_UART_CONTROL_DTR_FLAG (1 << 10)
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| 114 | #define ARM926_UART_CONTROL_RTS_FLAG (1 << 11)
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| 115 | #define ARM926_UART_CONTROL_OUT1_FLAG (1 << 12)
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| 116 | #define ARM926_UART_CONTROL_OUT2_FLAG (1 << 13)
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| 117 | #define ARM926_UART_CONTROL_RTSE_FLAG (1 << 14)
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| 118 | #define ARM926_UART_CONTROL_CTSE_FLAG (1 << 15)
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| 119 |
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| 120 | ioport32_t interrupt_fifo;
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| 121 | #define ARM926_UART_INTERRUPTFIFO_TX_MASK 0x7
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| 122 | #define ARM926_UART_INTERRUPTFIFO_TX_SHIFT 0
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| 123 | #define ARM926_UART_INTERRUPTFIFO_RX_MASK 0x7
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| 124 | #define ARM926_UART_INTERRUPTFIFO_RX_SHIFT 3
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| 125 |
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| 126 | /** Interrupt mask register */
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| 127 | ioport32_t interrupt_mask;
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| 128 | /** Pending interrupts before applying the mask */
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| 129 | const ioport32_t raw_interrupt_status;
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| 130 | /** Pending interrupts after applying the mask */
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| 131 | const ioport32_t masked_interrupt_status;
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| 132 | /** Write 1s to clear pending interrupts */
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| 133 | ioport32_t interrupt_clear;
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| 134 | #define ARM926_UART_INTERRUPT_RIM_FLAG (1 << 0)
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| 135 | #define ARM926_UART_INTERRUPT_CTSM_FLAG (1 << 1)
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| 136 | #define ARM926_UART_INTERRUPT_DCDM_FLAG (1 << 2)
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| 137 | #define ARM926_UART_INTERRUPT_DSRM_FLAG (1 << 3)
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| 138 | #define ARM926_UART_INTERRUPT_RX_FLAG (1 << 4)
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| 139 | #define ARM926_UART_INTERRUPT_TX_FLAG (1 << 5)
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| 140 | #define ARM926_UART_INTERRUPT_RT_FLAG (1 << 6)
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| 141 | #define ARM926_UART_INTERRUPT_FE_FLAG (1 << 7)
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| 142 | #define ARM926_UART_INTERRUPT_PE_FLAG (1 << 8)
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| 143 | #define ARM926_UART_INTERRUPT_BE_FLAG (1 << 9)
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| 144 | #define ARM926_UART_INTERRUPT_OE_FLAG (1 << 10)
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| 145 | #define ARM926_UART_INTERRUPT_ALL 0x3ff
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| 146 |
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| 147 | ioport32_t dma_control;
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| 148 | #define ARM926_UART_DMACONTROL_RXDMAEN_FLAG (1 << 0)
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| 149 | #define ARM926_UART_DMACONTROL_TXDMAEN_FLAG (1 << 1)
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| 150 | #define ARM926_UART_DMACONTROL_DMAONERR_FLAG (1 << 2)
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| 151 |
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| 152 | // TODO There is some reserved space here followed by
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| 153 | // peripheral identification registers.
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| 154 | } arm926_uart_regs_t;
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| 155 |
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| 156 | typedef struct {
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| 157 | arm926_uart_regs_t *regs;
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| 158 | indev_t *indev;
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| 159 | outdev_t outdev;
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| 160 | irq_t irq;
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| 161 | } arm926_uart_t;
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| 162 |
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| 163 | bool arm926_uart_init(arm926_uart_t *, inr_t, uintptr_t, size_t);
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| 164 | void arm926_uart_input_wire(arm926_uart_t *, indev_t *);
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| 165 |
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| 166 | #endif
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| 167 | /**
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| 168 | * @}
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| 169 | */
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