source: mainline/kernel/arch/xen32/include/hypercall.h@ c59dd1a2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c59dd1a2 was c59dd1a2, checked in by Martin Decky <martin@…>, 19 years ago

xen32 work: create identity mapping for the main memory zone,
make several dummy modifications to get to the banner
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Copyright (C) 2006 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __xen32_HYPERCALL_H__
30#define __xen32_HYPERCALL_H__
31
32#include <arch/types.h>
33#include <macros.h>
34
35
36typedef uint16_t domid_t;
37
38typedef struct {
39 uint64_t ptr; /**< Machine address of PTE */
40 uint64_t val; /**< New contents of PTE */
41} mmu_update_t;
42
43typedef struct {
44 unsigned int cmd;
45 union {
46 unsigned long mfn;
47 unsigned long linear_addr;
48 } arg1;
49 union {
50 unsigned int nr_ents;
51 void *vcpumask;
52 } arg2;
53} mmuext_op_t;
54
55
56#define XEN_MMU_UPDATE 1
57#define XEN_CONSOLE_IO 18
58#define XEN_MMUEXT_OP 26
59
60
61/*
62 * Commands for XEN_CONSOLE_IO
63 */
64#define CONSOLE_IO_WRITE 0
65#define CONSOLE_IO_READ 1
66
67
68#define MMUEXT_PIN_L1_TABLE 0
69#define MMUEXT_PIN_L2_TABLE 1
70#define MMUEXT_PIN_L3_TABLE 2
71#define MMUEXT_PIN_L4_TABLE 3
72#define MMUEXT_UNPIN_TABLE 4
73#define MMUEXT_NEW_BASEPTR 5
74#define MMUEXT_TLB_FLUSH_LOCAL 6
75#define MMUEXT_INVLPG_LOCAL 7
76#define MMUEXT_TLB_FLUSH_MULTI 8
77#define MMUEXT_INVLPG_MULTI 9
78#define MMUEXT_TLB_FLUSH_ALL 10
79#define MMUEXT_INVLPG_ALL 11
80#define MMUEXT_FLUSH_CACHE 12
81#define MMUEXT_SET_LDT 13
82#define MMUEXT_NEW_USER_BASEPTR 15
83
84
85#define DOMID_SELF (0x7FF0U)
86#define DOMID_IO (0x7FF1U)
87
88
89#define hypercall0(id) \
90 ({ \
91 unative_t ret; \
92 asm volatile ( \
93 "call hypercall_page + (" STRING(id) " * 32)\n" \
94 : "=a" (ret) \
95 : \
96 : "memory" \
97 ); \
98 ret; \
99 })
100
101#define hypercall1(id, p1) \
102 ({ \
103 unative_t ret, __ign1; \
104 asm volatile ( \
105 "call hypercall_page + (" STRING(id) " * 32)\n" \
106 : "=a" (ret), \
107 "=b" (__ign1) \
108 : "1" (p1) \
109 : "memory" \
110 ); \
111 ret; \
112 })
113
114#define hypercall2(id, p1, p2) \
115 ({ \
116 unative_t ret, __ign1, __ign2; \
117 asm volatile ( \
118 "call hypercall_page + (" STRING(id) " * 32)\n" \
119 : "=a" (ret), \
120 "=b" (__ign1), \
121 "=c" (__ign2) \
122 : "1" (p1), \
123 "2" (p2) \
124 : "memory" \
125 ); \
126 ret; \
127 })
128
129#define hypercall3(id, p1, p2, p3) \
130 ({ \
131 unative_t ret, __ign1, __ign2, __ign3; \
132 asm volatile ( \
133 "call hypercall_page + (" STRING(id) " * 32)\n" \
134 : "=a" (ret), \
135 "=b" (__ign1), \
136 "=c" (__ign2), \
137 "=d" (__ign3) \
138 : "1" (p1), \
139 "2" (p2), \
140 "3" (p3) \
141 : "memory" \
142 ); \
143 ret; \
144 })
145
146#define hypercall4(id, p1, p2, p3, p4) \
147 ({ \
148 unative_t ret, __ign1, __ign2, __ign3, __ign4; \
149 asm volatile ( \
150 "call hypercall_page + (" STRING(id) " * 32)\n" \
151 : "=a" (ret), \
152 "=b" (__ign1), \
153 "=c" (__ign2), \
154 "=d" (__ign3), \
155 "=S" (__ign4) \
156 : "1" (p1), \
157 "2" (p2), \
158 "3" (p3), \
159 "4" (p4) \
160 : "memory" \
161 ); \
162 ret; \
163 })
164
165#define hypercall5(id, p1, p2, p3, p4, p5) \
166 ({ \
167 unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5; \
168 asm volatile ( \
169 "call hypercall_page + (" STRING(id) " * 32)\n" \
170 : "=a" (ret), \
171 "=b" (__ign1), \
172 "=c" (__ign2), \
173 "=d" (__ign3), \
174 "=S" (__ign4), \
175 "=D" (__ign5) \
176 : "1" (p1), \
177 "2" (p2), \
178 "3" (p3), \
179 "4" (p4), \
180 "5" (p5) \
181 : "memory" \
182 ); \
183 ret; \
184 })
185
186
187static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
188{
189 return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
190}
191
192static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
193{
194 return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
195}
196
197static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
198{
199 return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
200}
201
202#endif
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