source: mainline/kernel/arch/xen32/include/hypercall.h@ 06e1e95

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06e1e95 was 06e1e95, checked in by Jakub Jermar <jakub@…>, 19 years ago

C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.
  • Property mode set to 100644
File size: 6.3 KB
RevLine 
[4965a846]1/*
2 * Copyright (C) 2006 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29#ifndef KERN_xen32_HYPERCALL_H_
30#define KERN_xen32_HYPERCALL_H_
[4965a846]31
32#include <arch/types.h>
[aecf79f]33#include <macros.h>
34
[c59dd1a2]35typedef uint16_t domid_t;
36
[7d3d641]37typedef struct {
38 uint8_t vector; /**< Exception vector */
39 uint8_t flags; /**< 0-3: privilege level; 4: clear event enable */
40 uint16_t cs; /**< Code selector */
[7c5a8dd]41 void *address; /**< Code offset */
[7d3d641]42} trap_info_t;
43
44
[7c5a8dd]45typedef struct {
46 evtchn_t port;
47} evtchn_send_t;
48
49typedef struct {
50 uint32_t cmd;
51 union {
52 evtchn_send_t send;
53 };
54} evtchn_op_t;
55
56
[7d3d641]57#define XEN_SET_TRAP_TABLE 0
[e12ccc5]58#define XEN_MMU_UPDATE 1
[7d3d641]59#define XEN_SET_CALLBACKS 4
[e12ccc5]60#define XEN_UPDATE_VA_MAPPING 14
[7c5a8dd]61#define XEN_EVENT_CHANNEL_OP 16
[5b23a82]62#define XEN_VERSION 17
[e12ccc5]63#define XEN_CONSOLE_IO 18
64#define XEN_VM_ASSIST 21
65#define XEN_MMUEXT_OP 26
[aecf79f]66
67
68/*
69 * Commands for XEN_CONSOLE_IO
70 */
71#define CONSOLE_IO_WRITE 0
72#define CONSOLE_IO_READ 1
73
[4965a846]74
[c59dd1a2]75#define MMUEXT_PIN_L1_TABLE 0
76#define MMUEXT_PIN_L2_TABLE 1
77#define MMUEXT_PIN_L3_TABLE 2
78#define MMUEXT_PIN_L4_TABLE 3
79#define MMUEXT_UNPIN_TABLE 4
80#define MMUEXT_NEW_BASEPTR 5
81#define MMUEXT_TLB_FLUSH_LOCAL 6
82#define MMUEXT_INVLPG_LOCAL 7
83#define MMUEXT_TLB_FLUSH_MULTI 8
84#define MMUEXT_INVLPG_MULTI 9
85#define MMUEXT_TLB_FLUSH_ALL 10
86#define MMUEXT_INVLPG_ALL 11
87#define MMUEXT_FLUSH_CACHE 12
88#define MMUEXT_SET_LDT 13
89#define MMUEXT_NEW_USER_BASEPTR 15
90
91
[7c5a8dd]92#define EVTCHNOP_SEND 4
93
94
[e12ccc5]95#define UVMF_NONE 0 /**< No flushing at all */
96#define UVMF_TLB_FLUSH 1 /**< Flush entire TLB(s) */
97#define UVMF_INVLPG 2 /**< Flush only one entry */
98#define UVMF_FLUSHTYPE_MASK 3
99#define UVMF_MULTI 0 /**< Flush subset of TLBs */
100#define UVMF_LOCAL 0 /**< Flush local TLB */
101#define UVMF_ALL (1 << 2) /**< Flush all TLBs */
102
103
104/*
105 * Commands to XEN_VM_ASSIST
106 */
107#define VMASST_CMD_ENABLE 0
108#define VMASST_CMD_DISABLE 1
109#define VMASST_TYPE_4GB_SEGMENTS 0
110#define VMASST_TYPE_4GB_SEGMENTS_NOTIFY 1
111#define VMASST_TYPE_WRITABLE_PAGETABLES 2
112
113
[c59dd1a2]114#define DOMID_SELF (0x7FF0U)
115#define DOMID_IO (0x7FF1U)
116
117
[5b23a82]118#define force_evtchn_callback() ((void) xen_version(0, 0))
119
[4965a846]120#define hypercall0(id) \
121 ({ \
122 unative_t ret; \
123 asm volatile ( \
124 "call hypercall_page + (" STRING(id) " * 32)\n" \
125 : "=a" (ret) \
126 : \
127 : "memory" \
128 ); \
129 ret; \
130 })
131
132#define hypercall1(id, p1) \
133 ({ \
134 unative_t ret, __ign1; \
135 asm volatile ( \
136 "call hypercall_page + (" STRING(id) " * 32)\n" \
137 : "=a" (ret), \
138 "=b" (__ign1) \
139 : "1" (p1) \
140 : "memory" \
141 ); \
142 ret; \
143 })
144
145#define hypercall2(id, p1, p2) \
146 ({ \
147 unative_t ret, __ign1, __ign2; \
148 asm volatile ( \
149 "call hypercall_page + (" STRING(id) " * 32)\n" \
150 : "=a" (ret), \
151 "=b" (__ign1), \
152 "=c" (__ign2) \
153 : "1" (p1), \
154 "2" (p2) \
155 : "memory" \
156 ); \
157 ret; \
158 })
159
160#define hypercall3(id, p1, p2, p3) \
161 ({ \
162 unative_t ret, __ign1, __ign2, __ign3; \
163 asm volatile ( \
164 "call hypercall_page + (" STRING(id) " * 32)\n" \
165 : "=a" (ret), \
166 "=b" (__ign1), \
167 "=c" (__ign2), \
168 "=d" (__ign3) \
169 : "1" (p1), \
170 "2" (p2), \
[aecf79f]171 "3" (p3) \
[4965a846]172 : "memory" \
173 ); \
174 ret; \
175 })
176
177#define hypercall4(id, p1, p2, p3, p4) \
178 ({ \
179 unative_t ret, __ign1, __ign2, __ign3, __ign4; \
180 asm volatile ( \
181 "call hypercall_page + (" STRING(id) " * 32)\n" \
182 : "=a" (ret), \
183 "=b" (__ign1), \
184 "=c" (__ign2), \
185 "=d" (__ign3), \
186 "=S" (__ign4) \
187 : "1" (p1), \
188 "2" (p2), \
189 "3" (p3), \
[aecf79f]190 "4" (p4) \
[4965a846]191 : "memory" \
192 ); \
193 ret; \
194 })
195
196#define hypercall5(id, p1, p2, p3, p4, p5) \
197 ({ \
[aecf79f]198 unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5; \
[4965a846]199 asm volatile ( \
200 "call hypercall_page + (" STRING(id) " * 32)\n" \
201 : "=a" (ret), \
202 "=b" (__ign1), \
203 "=c" (__ign2), \
204 "=d" (__ign3), \
205 "=S" (__ign4), \
206 "=D" (__ign5) \
207 : "1" (p1), \
208 "2" (p2), \
209 "3" (p3), \
210 "4" (p4), \
[aecf79f]211 "5" (p5) \
[4965a846]212 : "memory" \
213 ); \
214 ret; \
215 })
216
217
[c59dd1a2]218static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
[4965a846]219{
220 return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
221}
222
[e12ccc5]223static inline int xen_vm_assist(const unsigned int cmd, const unsigned int type)
[c59dd1a2]224{
[e12ccc5]225 return hypercall2(XEN_VM_ASSIST, cmd, type);
[c59dd1a2]226}
227
[7d3d641]228static inline int xen_set_callbacks(const unsigned int event_selector, const void *event_address, const unsigned int failsafe_selector, void *failsafe_address)
229{
230 return hypercall4(XEN_SET_CALLBACKS, event_selector, event_address, failsafe_selector, failsafe_address);
231}
232
233static inline int xen_set_trap_table(const trap_info_t *table)
234{
235 return hypercall1(XEN_SET_TRAP_TABLE, table);
236}
237
[5b23a82]238static inline int xen_version(const unsigned int cmd, const void *arg)
239{
240 return hypercall2(XEN_VERSION, cmd, arg);
241}
242
[7c5a8dd]243static inline int xen_notify_remote(evtchn_t channel)
244{
245 evtchn_op_t op;
246
247 op.cmd = EVTCHNOP_SEND;
248 op.send.port = channel;
249 return hypercall1(XEN_EVENT_CHANNEL_OP, &op);
250}
251
[4965a846]252#endif
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