source:
mainline/kernel/arch/sparc64/src@
aca95f6b
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| cpu | 84060e2 | 19 years | sparc64 work: - hw_map() can now support up to 8M requests - CPU … | ||
| ddi | ed166f7 | 19 years | A lot of untested sparc64 stuff: - Write ASID to hardware when a … | ||
| drivers | ccb0cbc | 19 years | Add BGR 0888 visual for Ultra 60 | ||
| mm | 44d0758 | 19 years | Add option to compile the sparc64 kernel without the TTE_CV bit … | ||
| proc | 91d6d28 | 19 years | Take the possible difference between kernel and physical address into … | ||
| smp | 00b38a3 | 19 years | IPI/cross-call support for sparc64. SMP on sparc64 is now fully supported. | ||
| trap | 282f2c9c | 19 years | Fix bad indentation in ofw.c sparc64 work: o Fix copyright in main.c … | ||
| asm.S | 6.2 KB | 6eabb6e6 | 19 years | Support for sparc64 FPU context. | |
| console.c | 3.8 KB | 8513ad7 | 19 years | Add support for IPC notifications even for polled ns16550 based keyboard. | |
| context.S | 3.2 KB | f0f05ad | 19 years | sparc64 context does not have to include the CLEANWIN register. | |
| dummy.s | 1.6 KB | 7ba7c6d | 19 years | A quote from from SPARC V9 specification: The Y register is … | |
| fpu_context.c | 5.0 KB | da02e69 | 19 years | Unfortunatelly, the sparc64's FPRS register is writable by … | |
| panic.S | 1.5 KB | 11675207 | 17 years | Move everything to kernel/. | |
| sparc64.c | 3.8 KB | 79f119b9 | 19 years | Modify the sparc64 startup code to not cause MMU traps before it takes … | |
| start.S | 10.0 KB | 44d0758 | 19 years | Add option to compile the sparc64 kernel without the TTE_CV bit … | |
|
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