source:
mainline/kernel/arch/sparc64/src@
06e1e95
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| cpu | 9a5b556 | 19 years | sparc64 work: - find a CPU node and read its clock_frequency attribute … | ||
| ddi | ed166f7 | 19 years | A lot of untested sparc64 stuff: - Write ASID to hardware when a … | ||
| drivers | 9a5b556 | 19 years | sparc64 work: - find a CPU node and read its clock_frequency attribute … | ||
| mm | 06e1e95 | 19 years | C99 compliant header guards (hopefully) everywhere in the kernel. … | ||
| proc | 208fa65 | 19 years | Revert last change. The register window save area is automatically … | ||
| trap | 06e1e95 | 19 years | C99 compliant header guards (hopefully) everywhere in the kernel. … | ||
| asm.S | 6.2 KB | 6eabb6e6 | 19 years | Support for sparc64 FPU context. | |
| console.c | 3.0 KB | 06e1e95 | 19 years | C99 compliant header guards (hopefully) everywhere in the kernel. … | |
| context.S | 3.3 KB | cfa70add | 19 years | sparc64 update. - Prototype userspace layer implementation that at … | |
| dummy.s | 1.5 KB | 6eabb6e6 | 19 years | Support for sparc64 FPU context. | |
| fpu_context.c | 5.0 KB | da02e69 | 19 years | Unfortunatelly, the sparc64's FPRS register is writable by … | |
| panic.S | 1.5 KB | 11675207 | 17 years | Move everything to kernel/. | |
| sparc64.c | 3.5 KB | 9a5b556 | 19 years | sparc64 work: - find a CPU node and read its clock_frequency attribute … | |
| start.S | 6.7 KB | e5ecc02 | 19 years | When creating TLB mapping for the sparc64 kernel, enable CV (cacheable … | |
|
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