source: mainline/kernel/arch/sparc64/src/trap/trap_table.S@ 002e613

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 002e613 was 002e613, checked in by Jakub Jermar <jakub@…>, 20 years ago

Allow architectures to decide between inlined and not inlined version of syscall wrapper.
Implement inlined syscall wrapper for sparc64.
  • Property mode set to 100644
File size: 24.2 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29/**
30 * This file contains kernel trap table.
31 */
32
33.register %g2, #scratch
34.register %g3, #scratch
35
36.text
37
38#include <arch/trap/trap_table.h>
39#include <arch/trap/regwin.h>
40#include <arch/trap/interrupt.h>
41#include <arch/trap/exception.h>
42#include <arch/trap/syscall.h>
43#include <arch/trap/mmu.h>
44#include <arch/mm/mmu.h>
45#include <arch/mm/page.h>
46#include <arch/stack.h>
47#include <arch/regdef.h>
48
49#define TABLE_SIZE TRAP_TABLE_SIZE
50#define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE
51
52/*
53 * Kernel trap table.
54 */
55.align TABLE_SIZE
56.global trap_table
57trap_table:
58
59/* TT = 0x08, TL = 0, instruction_access_exception */
60.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
61.global instruction_access_exception
62instruction_access_exception:
63 PREEMPTIBLE_HANDLER do_instruction_access_exc
64
65/* TT = 0x10, TL = 0, illegal_instruction */
66.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
67.global illegal_instruction
68illegal_instruction:
69 PREEMPTIBLE_HANDLER do_illegal_instruction
70
71/* TT = 0x24, TL = 0, clean_window handler */
72.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
73.global clean_window_handler
74clean_window_handler:
75 CLEAN_WINDOW_HANDLER
76
77/* TT = 0x32, TL = 0, data_access_error */
78.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
79.global data_access_error
80data_access_error:
81 PREEMPTIBLE_HANDLER do_data_access_error
82
83/* TT = 0x34, TL = 0, mem_address_not_aligned */
84.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
85.global mem_address_not_aligned
86mem_address_not_aligned:
87 PREEMPTIBLE_HANDLER do_mem_address_not_aligned
88
89/* TT = 0x41, TL = 0, interrupt_level_1 handler */
90.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
91.global interrupt_level_1_handler
92interrupt_level_1_handler:
93 INTERRUPT_LEVEL_N_HANDLER 1
94
95/* TT = 0x42, TL = 0, interrupt_level_2 handler */
96.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
97.global interrupt_level_2_handler
98interrupt_level_2_handler:
99 INTERRUPT_LEVEL_N_HANDLER 2
100
101/* TT = 0x43, TL = 0, interrupt_level_3 handler */
102.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
103.global interrupt_level_3_handler
104interrupt_level_3_handler:
105 INTERRUPT_LEVEL_N_HANDLER 3
106
107/* TT = 0x44, TL = 0, interrupt_level_4 handler */
108.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
109.global interrupt_level_4_handler
110interrupt_level_4_handler:
111 INTERRUPT_LEVEL_N_HANDLER 4
112
113/* TT = 0x45, TL = 0, interrupt_level_5 handler */
114.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
115.global interrupt_level_5_handler
116interrupt_level_5_handler:
117 INTERRUPT_LEVEL_N_HANDLER 5
118
119/* TT = 0x46, TL = 0, interrupt_level_6 handler */
120.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
121.global interrupt_level_6_handler
122interrupt_level_6_handler:
123 INTERRUPT_LEVEL_N_HANDLER 6
124
125/* TT = 0x47, TL = 0, interrupt_level_7 handler */
126.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
127.global interrupt_level_7_handler
128interrupt_level_7_handler:
129 INTERRUPT_LEVEL_N_HANDLER 7
130
131/* TT = 0x48, TL = 0, interrupt_level_8 handler */
132.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
133.global interrupt_level_8_handler
134interrupt_level_8_handler:
135 INTERRUPT_LEVEL_N_HANDLER 8
136
137/* TT = 0x49, TL = 0, interrupt_level_9 handler */
138.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
139.global interrupt_level_9_handler
140interrupt_level_9_handler:
141 INTERRUPT_LEVEL_N_HANDLER 9
142
143/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
144.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
145.global interrupt_level_10_handler
146interrupt_level_10_handler:
147 INTERRUPT_LEVEL_N_HANDLER 10
148
149/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
150.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
151.global interrupt_level_11_handler
152interrupt_level_11_handler:
153 INTERRUPT_LEVEL_N_HANDLER 11
154
155/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
156.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
157.global interrupt_level_12_handler
158interrupt_level_12_handler:
159 INTERRUPT_LEVEL_N_HANDLER 12
160
161/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
162.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
163.global interrupt_level_13_handler
164interrupt_level_13_handler:
165 INTERRUPT_LEVEL_N_HANDLER 13
166
167/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
168.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
169.global interrupt_level_14_handler
170interrupt_level_14_handler:
171 INTERRUPT_LEVEL_N_HANDLER 14
172
173/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
174.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
175.global interrupt_level_15_handler
176interrupt_level_15_handler:
177 INTERRUPT_LEVEL_N_HANDLER 15
178
179/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
180.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
181.global interrupt_vector_trap_handler
182interrupt_vector_trap_handler:
183 INTERRUPT_VECTOR_TRAP_HANDLER
184
185/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
186.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
187.global fast_instruction_access_mmu_miss_handler
188fast_instruction_access_mmu_miss_handler:
189 FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
190
191/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
192.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
193.global fast_data_access_mmu_miss_handler
194fast_data_access_mmu_miss_handler:
195 FAST_DATA_ACCESS_MMU_MISS_HANDLER
196
197/* TT = 0x6c, TL = 0, fast_data_access_protection */
198.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
199.global fast_data_access_protection_handler
200fast_data_access_protection_handler:
201 FAST_DATA_ACCESS_PROTECTION_HANDLER
202
203/* TT = 0x80, TL = 0, spill_0_normal handler */
204.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
205.global spill_0_normal
206spill_0_normal:
207 SPILL_NORMAL_HANDLER_KERNEL
208
209/* TT = 0x84, TL = 0, spill_1_normal handler */
210.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
211.global spill_1_normal
212spill_1_normal:
213 SPILL_NORMAL_HANDLER_USERSPACE
214
215/* TT = 0x88, TL = 0, spill_2_normal handler */
216.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
217.global spill_2_normal
218spill_2_normal:
219 SPILL_TO_USPACE_WINDOW_BUFFER
220
221/* TT = 0xc0, TL = 0, fill_0_normal handler */
222.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
223.global fill_0_normal
224fill_0_normal:
225 FILL_NORMAL_HANDLER_KERNEL
226
227/* TT = 0xc4, TL = 0, fill_1_normal handler */
228.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
229.global fill_1_normal
230fill_1_normal:
231 FILL_NORMAL_HANDLER_USERSPACE
232
233/* TT = 0x100, TL = 0, trap_instruction_0 */
234.org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE
235.global trap_instruction_0
236trap_instruction_0:
237 TRAP_INSTRUCTION 0
238
239/* TT = 0x101, TL = 0, trap_instruction_1 */
240.org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE
241.global trap_instruction_1
242trap_instruction_1:
243 TRAP_INSTRUCTION 1
244
245/* TT = 0x102, TL = 0, trap_instruction_2 */
246.org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE
247.global trap_instruction_2
248trap_instruction_2:
249 TRAP_INSTRUCTION 2
250
251/* TT = 0x103, TL = 0, trap_instruction_3 */
252.org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE
253.global trap_instruction_3
254trap_instruction_3:
255 TRAP_INSTRUCTION 3
256
257/* TT = 0x104, TL = 0, trap_instruction_4 */
258.org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE
259.global trap_instruction_4
260trap_instruction_4:
261 TRAP_INSTRUCTION 4
262
263/* TT = 0x105, TL = 0, trap_instruction_5 */
264.org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE
265.global trap_instruction_5
266trap_instruction_5:
267 TRAP_INSTRUCTION 5
268
269/* TT = 0x106, TL = 0, trap_instruction_6 */
270.org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE
271.global trap_instruction_6
272trap_instruction_6:
273 TRAP_INSTRUCTION 6
274
275/* TT = 0x107, TL = 0, trap_instruction_7 */
276.org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE
277.global trap_instruction_7
278trap_instruction_7:
279 TRAP_INSTRUCTION 7
280
281/* TT = 0x108, TL = 0, trap_instruction_8 */
282.org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE
283.global trap_instruction_8
284trap_instruction_8:
285 TRAP_INSTRUCTION 8
286
287/* TT = 0x109, TL = 0, trap_instruction_9 */
288.org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE
289.global trap_instruction_9
290trap_instruction_9:
291 TRAP_INSTRUCTION 9
292
293/* TT = 0x10a, TL = 0, trap_instruction_10 */
294.org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE
295.global trap_instruction_10
296trap_instruction_10:
297 TRAP_INSTRUCTION 10
298
299/* TT = 0x10b, TL = 0, trap_instruction_11 */
300.org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE
301.global trap_instruction_11
302trap_instruction_11:
303 TRAP_INSTRUCTION 11
304
305/* TT = 0x10c, TL = 0, trap_instruction_12 */
306.org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE
307.global trap_instruction_12
308trap_instruction_12:
309 TRAP_INSTRUCTION 12
310
311/* TT = 0x10d, TL = 0, trap_instruction_13 */
312.org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE
313.global trap_instruction_13
314trap_instruction_13:
315 TRAP_INSTRUCTION 13
316
317/* TT = 0x10e, TL = 0, trap_instruction_14 */
318.org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE
319.global trap_instruction_14
320trap_instruction_14:
321 TRAP_INSTRUCTION 14
322
323/* TT = 0x10f, TL = 0, trap_instruction_15 */
324.org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE
325.global trap_instruction_15
326trap_instruction_15:
327 TRAP_INSTRUCTION 15
328
329/* TT = 0x110, TL = 0, trap_instruction_16 */
330.org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE
331.global trap_instruction_16
332trap_instruction_16:
333 TRAP_INSTRUCTION 16
334
335/* TT = 0x111, TL = 0, trap_instruction_17 */
336.org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE
337.global trap_instruction_17
338trap_instruction_17:
339 TRAP_INSTRUCTION 17
340
341/* TT = 0x112, TL = 0, trap_instruction_18 */
342.org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE
343.global trap_instruction_18
344trap_instruction_18:
345 TRAP_INSTRUCTION 18
346
347/* TT = 0x113, TL = 0, trap_instruction_19 */
348.org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE
349.global trap_instruction_19
350trap_instruction_19:
351 TRAP_INSTRUCTION 19
352
353/* TT = 0x114, TL = 0, trap_instruction_20 */
354.org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE
355.global trap_instruction_20
356trap_instruction_20:
357 TRAP_INSTRUCTION 20
358
359/* TT = 0x115, TL = 0, trap_instruction_21 */
360.org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE
361.global trap_instruction_21
362trap_instruction_21:
363 TRAP_INSTRUCTION 21
364
365/* TT = 0x116, TL = 0, trap_instruction_22 */
366.org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE
367.global trap_instruction_22
368trap_instruction_22:
369 TRAP_INSTRUCTION 22
370
371/* TT = 0x117, TL = 0, trap_instruction_23 */
372.org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE
373.global trap_instruction_23
374trap_instruction_23:
375 TRAP_INSTRUCTION 23
376
377/* TT = 0x118, TL = 0, trap_instruction_24 */
378.org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE
379.global trap_instruction_24
380trap_instruction_24:
381 TRAP_INSTRUCTION 24
382
383/* TT = 0x119, TL = 0, trap_instruction_25 */
384.org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE
385.global trap_instruction_25
386trap_instruction_25:
387 TRAP_INSTRUCTION 25
388
389/* TT = 0x11a, TL = 0, trap_instruction_26 */
390.org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE
391.global trap_instruction_26
392trap_instruction_26:
393 TRAP_INSTRUCTION 26
394
395/* TT = 0x11b, TL = 0, trap_instruction_27 */
396.org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE
397.global trap_instruction_27
398trap_instruction_27:
399 TRAP_INSTRUCTION 27
400
401/* TT = 0x11c, TL = 0, trap_instruction_28 */
402.org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE
403.global trap_instruction_28
404trap_instruction_28:
405 TRAP_INSTRUCTION 28
406
407/* TT = 0x11d, TL = 0, trap_instruction_29 */
408.org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE
409.global trap_instruction_29
410trap_instruction_29:
411 TRAP_INSTRUCTION 29
412
413/* TT = 0x11e, TL = 0, trap_instruction_30 */
414.org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE
415.global trap_instruction_30
416trap_instruction_30:
417 TRAP_INSTRUCTION 30
418
419/* TT = 0x11f, TL = 0, trap_instruction_31 */
420.org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE
421.global trap_instruction_31
422trap_instruction_31:
423 TRAP_INSTRUCTION 31
424
425/*
426 * Handlers for TL>0.
427 */
428
429/* TT = 0x08, TL > 0, instruction_access_exception */
430.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
431.global instruction_access_exception_high
432instruction_access_exception_high:
433 PREEMPTIBLE_HANDLER do_instruction_access_exc
434
435/* TT = 0x10, TL > 0, illegal_instruction */
436.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
437.global illegal_instruction_high
438illegal_instruction_high:
439 PREEMPTIBLE_HANDLER do_illegal_instruction
440
441/* TT = 0x24, TL > 0, clean_window handler */
442.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
443.global clean_window_handler_high
444clean_window_handler_high:
445 CLEAN_WINDOW_HANDLER
446
447/* TT = 0x32, TL > 0, data_access_error */
448.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
449.global data_access_error_high
450data_access_error_high:
451 PREEMPTIBLE_HANDLER do_data_access_error
452
453/* TT = 0x34, TL > 0, mem_address_not_aligned */
454.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
455.global mem_address_not_aligned_high
456mem_address_not_aligned_high:
457 PREEMPTIBLE_HANDLER do_mem_address_not_aligned
458
459/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
460.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
461.global fast_instruction_access_mmu_miss_handler_high
462fast_instruction_access_mmu_miss_handler_high:
463 FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
464
465/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
466.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
467.global fast_data_access_mmu_miss_handler_high
468fast_data_access_mmu_miss_handler_high:
469 FAST_DATA_ACCESS_MMU_MISS_HANDLER
470
471/* TT = 0x6c, TL > 0, fast_data_access_protection */
472.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
473.global fast_data_access_protection_handler_high
474fast_data_access_protection_handler_high:
475 FAST_DATA_ACCESS_PROTECTION_HANDLER
476
477/* TT = 0x80, TL > 0, spill_0_normal handler */
478.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
479.global spill_0_normal_high
480spill_0_normal_high:
481 SPILL_NORMAL_HANDLER_KERNEL
482
483/* TT = 0x88, TL > 0, spill_2_normal handler */
484.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
485.global spill_2_normal_high
486spill_2_normal_high:
487 SPILL_TO_USPACE_WINDOW_BUFFER
488
489/* TT = 0xa0, TL > 0, spill_0_other handler */
490.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
491.global spill_0_other_high
492spill_0_other_high:
493 SPILL_TO_USPACE_WINDOW_BUFFER
494
495/* TT = 0xc0, TL > 0, fill_0_normal handler */
496.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
497.global fill_0_normal_high
498fill_0_normal_high:
499 FILL_NORMAL_HANDLER_KERNEL
500
501#define NOT(x) ((x) == 0)
502
503/* Preemptible trap handler for TL=1.
504 *
505 * This trap handler makes arrangements to make calling of scheduler() from
506 * within a trap context possible. It is called from several other trap
507 * handlers.
508 *
509 * This function can be entered either with interrupt globals or alternate globals.
510 * Memory management trap handlers are obliged to switch to one of those global sets
511 * prior to calling this function. Register window management functions are not
512 * allowed to modify the alternate global registers.
513 *
514 * Input registers:
515 * %g1 Address of function to call.
516 * %g2 First argument for the function.
517 * %g6 Pre-set as kernel stack base if trap from userspace.
518 * %g7 Pre-set as address of the userspace window buffer.
519 */
520.macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall
521.if NOT(\is_syscall)
522 rdpr %tstate, %g3
523 andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode...
524 bnz 0f ! ...skip setting of kernel stack and primary context
525 nop
526.endif
527 /*
528 * Normal window spills will go to the userspace window buffer.
529 */
530 wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
531
532 /*
533 * Switch to kernel stack. The old stack is
534 * automatically saved in the old window's %sp
535 * and the new window's %fp.
536 */
537 save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
538
539.if \is_syscall
540 /*
541 * Copy arguments for the syscall to the new window.
542 */
543 mov %i0, %o2
544 mov %i1, %o3
545 mov %i2, %o4
546 mov %i3, %o5
547.endif
548
549 /*
550 * Mark the CANSAVE windows as OTHER windows.
551 * Set CLEANWIN to NWINDOW-1 so that clean_window traps do not occur.
552 */
553 rdpr %cansave, %l0
554 wrpr %l0, %otherwin
555 wrpr %g0, %cansave
556 wrpr %g0, NWINDOW - 1, %cleanwin
557
558 /*
559 * Switch to primary context 0.
560 */
561 mov VA_PRIMARY_CONTEXT_REG, %l0
562 stxa %g0, [%l0] ASI_DMMU
563 rd %pc, %l0
564 flush %l0
565
566.if NOT(\is_syscall)
567 ba 1f
568 nop
569
5700:
571 save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
572
573 /*
574 * At this moment, we are using the kernel stack
575 * and have successfully allocated a register window.
576 */
5771:
578.endif
579 /*
580 * Other window spills will go to the userspace window buffer
581 * and normal spills will go to the kernel stack.
582 */
583 wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate
584
585 /*
586 * Copy arguments.
587 */
588 mov %g1, %l0
589 mov %g2, %o0
590
591 /*
592 * Save TSTATE, TPC and TNPC aside.
593 */
594 rdpr %tstate, %g1
595 rdpr %tpc, %g2
596 rdpr %tnpc, %g3
597
598 /*
599 * The following memory accesses will not fault
600 * because special provisions are made to have
601 * the kernel stack of THREAD locked in DTLB.
602 */
603 stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
604 stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
605 stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
606
607 wrpr %g0, 0, %tl
608 wrpr %g0, PSTATE_PRIV_BIT, %pstate
609 SAVE_GLOBALS
610
611 /*
612 * Call the higher-level handler and pass istate as second parameter.
613 */
614 call %l0
615 add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
616
617.if \is_syscall
618 /*
619 * Copy the value returned by the syscall.
620 */
621 mov %o0, %i0
622.endif
623
624 RESTORE_GLOBALS
625 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
626 wrpr %g0, 1, %tl
627
628 /*
629 * Read TSTATE, TPC and TNPC from saved copy.
630 */
631 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
632 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
633 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
634
635 /*
636 * Restore TSTATE, TPC and TNPC from saved copies.
637 */
638 wrpr %g1, 0, %tstate
639 wrpr %g2, 0, %tpc
640 wrpr %g3, 0, %tnpc
641
642 /*
643 * If OTHERWIN is zero, then all the userspace windows have been
644 * spilled to kernel memory (i.e. register window buffer). If
645 * OTHERWIN is non-zero, then some userspace windows are still
646 * valid. Others might have been spilled. However, the CWP pointer
647 * needs no fixing because the scheduler had not been called.
648 */
649 rdpr %otherwin, %l0
650 brnz %l0, 0f
651 nop
652
653 /*
654 * OTHERWIN == 0
655 */
656
657 /*
658 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
659 */
660 and %g1, TSTATE_CWP_MASK, %l0
661 inc %l0
662 and %l0, TSTATE_CWP_MASK, %l0 ! %l0 mod NWINDOW
663 rdpr %cwp, %l1
664 cmp %l0, %l1
665 bz 0f ! CWP is ok
666 nop
667
668 /*
669 * Fix CWP.
670 * Just for reminder, the input registers in the current window
671 * are the output registers of the window to which we want to
672 * restore. Because the fill trap fills only input and local
673 * registers of a window, we need to preserve those output
674 * registers manually.
675 */
676 flushw
677 mov %sp, %g2
678 stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
679 stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
680 stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
681 stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
682 stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
683 stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
684 stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
685 stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
686 wrpr %l0, 0, %cwp
687 mov %g2, %sp
688 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
689 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
690 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
691 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
692 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
693 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
694 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
695 ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
696
697 /*
698 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
699 * The CWP has already been restored to the value it had prior to the SAVE
700 * at the beginning of this function.
701 */
7020:
703.if NOT(\is_syscall)
704 rdpr %tstate, %g1
705 andcc %g1, TSTATE_PRIV_BIT, %g0 ! if we are not returning to userspace...,
706 bnz 1f ! ...skip restoring userspace windows
707 nop
708.endif
709
710 /*
711 * Spills and fills will be processed by the {spill,fill}_1_normal
712 * handlers.
713 */
714 wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
715
716 /*
717 * Set primary context according to secondary context.
718 */
719 wr %g0, ASI_DMMU, %asi
720 ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
721 stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
722 flush %o7
723
724 rdpr %cwp, %g1
725 rdpr %otherwin, %g2
726
727 /*
728 * Skip all OTHERWIN windows and descend to the first window
729 * in the userspace window buffer.
730 */
731 sub %g1, %g2, %g3
732 dec %g3
733 and %g3, NWINDOW - 1, %g3
734 wrpr %g3, 0, %cwp
735
736 /*
737 * CWP is now in the window last saved in the userspace window buffer.
738 * Fill all windows stored in the buffer.
739 */
740 clr %g4
7410: andcc %g7, PAGE_WIDTH - 1, %g0 ! PAGE_SIZE alignment check
742 bz 0f ! %g7 is page-aligned, no more windows to refill
743 nop
744
745 add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
746 ldx [%g7 + L0_OFFSET], %l0
747 ldx [%g7 + L1_OFFSET], %l1
748 ldx [%g7 + L2_OFFSET], %l2
749 ldx [%g7 + L3_OFFSET], %l3
750 ldx [%g7 + L4_OFFSET], %l4
751 ldx [%g7 + L5_OFFSET], %l5
752 ldx [%g7 + L6_OFFSET], %l6
753 ldx [%g7 + L7_OFFSET], %l7
754 ldx [%g7 + I0_OFFSET], %i0
755 ldx [%g7 + I1_OFFSET], %i1
756 ldx [%g7 + I2_OFFSET], %i2
757 ldx [%g7 + I3_OFFSET], %i3
758 ldx [%g7 + I4_OFFSET], %i4
759 ldx [%g7 + I5_OFFSET], %i5
760 ldx [%g7 + I6_OFFSET], %i6
761 ldx [%g7 + I7_OFFSET], %i7
762
763 dec %g3
764 and %g3, NWINDOW - 1, %g3
765 wrpr %g3, 0, %cwp ! switch to the preceeding window
766
767 ba 0b
768 inc %g4
769
7700:
771 /*
772 * Switch back to the proper current window and adjust
773 * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN.
774 */
775 wrpr %g1, 0, %cwp
776 add %g4, %g2, %g2
777 cmp %g2, NWINDOW - 2
778 bg 2f ! fix the CANRESTORE=NWINDOW-1 anomaly
779 mov NWINDOW - 2, %g1 ! use dealy slot for both cases
780 sub %g1, %g2, %g1
781
782 wrpr %g0, 0, %otherwin
783 wrpr %g1, 0, %cansave ! NWINDOW - 2 - CANRESTORE
784 wrpr %g2, 0, %canrestore ! OTHERWIN + windows in the buffer
785 wrpr %g2, 0, %cleanwin ! avoid information leak
786
7871:
788 restore
789
790.if \is_syscall
791 done
792.else
793 retry
794.endif
795
796 /*
797 * We got here in order to avoid inconsistency of the window state registers.
798 * If the:
799 *
800 * save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
801 *
802 * instruction trapped and spilled a register window into the userspace
803 * window buffer, we have just restored NWINDOW - 1 register windows.
804 * However, CANRESTORE can be only NWINDOW - 2 at most.
805 *
806 * The solution is to manually switch to (CWP - 1) mod NWINDOW
807 * and set the window state registers so that:
808 *
809 * CANRESTORE = NWINDOW - 2
810 * CLEANWIN = NWINDOW - 2
811 * CANSAVE = 0
812 * OTHERWIN = 0
813 *
814 * The RESTORE isntruction is therfore to be skipped.
815 */
8162:
817 wrpr %g0, 0, %otherwin
818 wrpr %g0, 0, %cansave
819 wrpr %g1, 0, %canrestore
820 wrpr %g1, 0, %cleanwin
821
822 rdpr %cwp, %g1
823 dec %g1
824 and %g1, NWINDOW - 1, %g1
825 wrpr %g1, 0, %cwp ! CWP--
826
827.if \is_syscall
828 done
829.else
830 retry
831.endif
832
833.endm
834
835.global preemptible_handler
836preemptible_handler:
837 PREEMPTIBLE_HANDLER_TEMPLATE 0
838
839.global trap_instruction_handler
840trap_instruction_handler:
841 PREEMPTIBLE_HANDLER_TEMPLATE 1
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