1 | /*
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2 | * Copyright (c) 2009 Pavel Rimsky
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup sparc64interrupt
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30 | * @{
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31 | */
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32 | /** @file
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33 | */
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34 |
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35 | #include <arch/interrupt.h>
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36 | #include <arch/trap/interrupt.h>
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37 | #include <arch/sparc64.h>
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38 | #include <interrupt.h>
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39 | #include <ddi/irq.h>
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40 | #include <stdint.h>
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41 | #include <debug.h>
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42 | #include <arch/asm.h>
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43 | #include <barrier.h>
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44 | #include <log.h>
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45 | #include <arch.h>
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46 | #include <mm/tlb.h>
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47 | #include <config.h>
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48 | #include <synch/spinlock.h>
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49 | #include <arch/sun4v/hypercall.h>
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50 |
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51 | /** number of uint64_t-s in one CPU mondo message */
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52 | #define CPU_MONDO_ENTRY_SIZE 8
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53 |
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54 | /** number of entries (messages) in the CPU mondo queue */
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55 | #define CPU_MONDO_NENTRIES 8
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56 |
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57 | /** number of uint64_t-s in the CPU mondo queue */
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58 | #define CPU_MONDO_QUEUE_SIZE ((CPU_MONDO_NENTRIES) * (CPU_MONDO_ENTRY_SIZE))
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59 |
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60 | /** used to identify CPU mondo queue in the hypercall */
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61 | #define CPU_MONDO_QUEUE_ID 0x3c
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62 |
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63 | /** ASI for reading/writing CPU mondo head/tail registers */
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64 | #define ASI_QUEUE 0x25
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65 |
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66 | /** VA for reading the CPU mondo tail */
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67 | #define VA_CPU_MONDO_QUEUE_TAIL 0x3c8
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68 |
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69 | /** VA for reading/writing the CPU mondo head */
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70 | #define VA_CPU_MONDO_QUEUE_HEAD 0x3c0
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71 |
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72 | /**
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73 | * array which contains CPU mondo queue for every CPU
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74 | */
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75 | uint64_t cpu_mondo_queues[MAX_NUM_STRANDS][CPU_MONDO_QUEUE_SIZE]
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76 | __attribute__((aligned(CPU_MONDO_QUEUE_SIZE * sizeof(uint64_t))));
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77 |
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78 | /**
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79 | * Initializes CPU mondo queue for the current CPU.
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80 | */
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81 | void sun4v_ipi_init(void)
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82 | {
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83 | if (__hypercall_fast3(
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84 | CPU_QCONF,
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85 | CPU_MONDO_QUEUE_ID,
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86 | KA2PA(cpu_mondo_queues[CPU->id]),
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87 | CPU_MONDO_NENTRIES) != HV_EOK)
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88 | panic("Initializing mondo queue failed on CPU %" PRIu64 ".\n",
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89 | CPU->arch.id);
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90 | }
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91 |
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92 | /**
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93 | * Handler of the CPU Mondo trap. Reads the message queue, updates the head
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94 | * register and processes the message (invokes a function call).
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95 | */
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96 | void cpu_mondo(unsigned int tt, istate_t *istate)
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97 | {
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98 | #ifdef CONFIG_SMP
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99 | unsigned int tail = asi_u64_read(ASI_QUEUE, VA_CPU_MONDO_QUEUE_TAIL);
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100 | unsigned int head = asi_u64_read(ASI_QUEUE, VA_CPU_MONDO_QUEUE_HEAD);
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101 |
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102 | while (head != tail) {
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103 | uint64_t data1 = cpu_mondo_queues[CPU->id][0];
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104 |
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105 | head = (head + CPU_MONDO_ENTRY_SIZE * sizeof(uint64_t)) %
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106 | (CPU_MONDO_QUEUE_SIZE * sizeof(uint64_t));
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107 | asi_u64_write(ASI_QUEUE, VA_CPU_MONDO_QUEUE_HEAD, head);
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108 |
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109 | if (data1 == (uintptr_t) tlb_shootdown_ipi_recv) {
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110 | ((void (*)(void)) data1)();
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111 | } else {
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112 | log(LF_ARCH, LVL_DEBUG, "Spurious interrupt on %" PRIu64
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113 | ", data = %" PRIx64 ".", CPU->arch.id, data1);
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114 | }
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115 | }
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116 | #endif
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117 | }
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118 |
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119 | /** @}
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120 | */
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