| 1 | /*
|
|---|
| 2 | * Copyright (c) 2005 Jakub Jermar
|
|---|
| 3 | * All rights reserved.
|
|---|
| 4 | *
|
|---|
| 5 | * Redistribution and use in source and binary forms, with or without
|
|---|
| 6 | * modification, are permitted provided that the following conditions
|
|---|
| 7 | * are met:
|
|---|
| 8 | *
|
|---|
| 9 | * - Redistributions of source code must retain the above copyright
|
|---|
| 10 | * notice, this list of conditions and the following disclaimer.
|
|---|
| 11 | * - Redistributions in binary form must reproduce the above copyright
|
|---|
| 12 | * notice, this list of conditions and the following disclaimer in the
|
|---|
| 13 | * documentation and/or other materials provided with the distribution.
|
|---|
| 14 | * - The name of the author may not be used to endorse or promote products
|
|---|
| 15 | * derived from this software without specific prior written permission.
|
|---|
| 16 | *
|
|---|
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|---|
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|---|
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|---|
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|---|
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|---|
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|---|
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|---|
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|---|
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| 27 | */
|
|---|
| 28 |
|
|---|
| 29 | /** @addtogroup sparc64interrupt
|
|---|
| 30 | * @{
|
|---|
| 31 | */
|
|---|
| 32 | /** @file
|
|---|
| 33 | */
|
|---|
| 34 |
|
|---|
| 35 | #include <arch/interrupt.h>
|
|---|
| 36 | #include <arch/sparc64.h>
|
|---|
| 37 | #include <arch/trap/interrupt.h>
|
|---|
| 38 | #include <interrupt.h>
|
|---|
| 39 | #include <ddi/irq.h>
|
|---|
| 40 | #include <stdint.h>
|
|---|
| 41 | #include <debug.h>
|
|---|
| 42 | #include <arch/asm.h>
|
|---|
| 43 | #include <barrier.h>
|
|---|
| 44 | #include <log.h>
|
|---|
| 45 | #include <arch.h>
|
|---|
| 46 | #include <mm/tlb.h>
|
|---|
| 47 | #include <config.h>
|
|---|
| 48 | #include <synch/spinlock.h>
|
|---|
| 49 |
|
|---|
| 50 | /** Process hardware interrupt.
|
|---|
| 51 | *
|
|---|
| 52 | * @param n Ignored.
|
|---|
| 53 | * @param istate Ignored.
|
|---|
| 54 | */
|
|---|
| 55 | void interrupt(unsigned int n, istate_t *istate)
|
|---|
| 56 | {
|
|---|
| 57 | uint64_t status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
|
|---|
| 58 | if (status & (!INTR_DISPATCH_STATUS_BUSY))
|
|---|
| 59 | panic("Interrupt Dispatch Status busy bit not set\n");
|
|---|
| 60 |
|
|---|
| 61 | uint64_t intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
|
|---|
| 62 | #if defined (US)
|
|---|
| 63 | uint64_t data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
|
|---|
| 64 | #elif defined (US3)
|
|---|
| 65 | uint64_t data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
|
|---|
| 66 | #endif
|
|---|
| 67 |
|
|---|
| 68 | irq_t *irq = irq_dispatch_and_lock(data0);
|
|---|
| 69 | if (irq) {
|
|---|
| 70 | /*
|
|---|
| 71 | * The IRQ handler was found.
|
|---|
| 72 | */
|
|---|
| 73 | irq->handler(irq);
|
|---|
| 74 |
|
|---|
| 75 | /*
|
|---|
| 76 | * See if there is a clear-interrupt-routine and call it.
|
|---|
| 77 | */
|
|---|
| 78 | if (irq->cir)
|
|---|
| 79 | irq->cir(irq->cir_arg, irq->inr);
|
|---|
| 80 |
|
|---|
| 81 | irq_spinlock_unlock(&irq->lock, false);
|
|---|
| 82 | } else if (data0 > config.base) {
|
|---|
| 83 | /*
|
|---|
| 84 | * This is a cross-call.
|
|---|
| 85 | * data0 contains address of the kernel function.
|
|---|
| 86 | * We call the function only after we verify
|
|---|
| 87 | * it is one of the supported ones.
|
|---|
| 88 | */
|
|---|
| 89 | #ifdef CONFIG_SMP
|
|---|
| 90 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv)
|
|---|
| 91 | tlb_shootdown_ipi_recv();
|
|---|
| 92 | #endif
|
|---|
| 93 | } else {
|
|---|
| 94 | /*
|
|---|
| 95 | * Spurious interrupt.
|
|---|
| 96 | */
|
|---|
| 97 | #ifdef CONFIG_DEBUG
|
|---|
| 98 | log(LF_ARCH, LVL_DEBUG,
|
|---|
| 99 | "cpu%u: spurious interrupt (intrcv=%#" PRIx64 ", data0=%#"
|
|---|
| 100 | PRIx64 ")", CPU->id, intrcv, data0);
|
|---|
| 101 | #else
|
|---|
| 102 | (void) intrcv;
|
|---|
| 103 | #endif
|
|---|
| 104 | }
|
|---|
| 105 |
|
|---|
| 106 | membar();
|
|---|
| 107 | asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
|
|---|
| 108 | }
|
|---|
| 109 |
|
|---|
| 110 | /** @}
|
|---|
| 111 | */
|
|---|
