source: mainline/kernel/arch/sparc64/src/trap/interrupt.c@ 05882233

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 05882233 was 05882233, checked in by Jiří Zárevúcky <jiri.zarevucky@…>, 7 years ago

Unify various barrier includes into <barrier.h>

  • Property mode set to 100644
File size: 5.3 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * Copyright (c) 2009 Pavel Rimsky
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup sparc64interrupt
31 * @{
32 */
33/** @file
34 */
35
36#include <arch/interrupt.h>
37#include <arch/trap/interrupt.h>
38#include <arch/trap/exception.h>
39#include <arch/trap/mmu.h>
40#include <arch/sparc64.h>
41#include <interrupt.h>
42#include <ddi/irq.h>
43#include <stdbool.h>
44#include <debug.h>
45#include <arch/asm.h>
46#include <barrier.h>
47#include <arch/drivers/tick.h>
48#include <print.h>
49#include <arch.h>
50#include <mm/tlb.h>
51#include <config.h>
52#include <synch/spinlock.h>
53
54void exc_arch_init(void)
55{
56 exc_register(TT_INSTRUCTION_ACCESS_EXCEPTION,
57 "instruction_access_exception", false,
58 instruction_access_exception);
59 exc_register(TT_INSTRUCTION_ACCESS_ERROR,
60 "instruction_access_error", false,
61 instruction_access_error);
62
63#ifdef SUN4V
64 exc_register(TT_IAE_UNAUTH_ACCESS,
65 "iae_unauth_access", false,
66 instruction_access_exception);
67 exc_register(TT_IAE_NFO_PAGE,
68 "iae_nfo_page", false,
69 instruction_access_exception);
70#endif
71
72 exc_register(TT_ILLEGAL_INSTRUCTION,
73 "illegal_instruction", false,
74 illegal_instruction);
75 exc_register(TT_PRIVILEGED_OPCODE,
76 "privileged_opcode", false,
77 privileged_opcode);
78 exc_register(TT_UNIMPLEMENTED_LDD,
79 "unimplemented_LDD", false,
80 unimplemented_LDD);
81 exc_register(TT_UNIMPLEMENTED_STD,
82 "unimplemented_STD", false,
83 unimplemented_STD);
84
85#ifdef SUN4V
86 exc_register(TT_DAE_INVALID_ASI,
87 "dae_invalid_asi", false,
88 data_access_exception);
89 exc_register(TT_DAE_PRIVILEGE_VIOLATION,
90 "dae_privilege_violation", false,
91 data_access_exception);
92 exc_register(TT_DAE_NC_PAGE,
93 "dae_nc_page", false,
94 data_access_exception);
95 exc_register(TT_DAE_NC_PAGE,
96 "dae_nc_page", false,
97 data_access_exception);
98 exc_register(TT_DAE_NFO_PAGE,
99 "dae_nfo_page", false,
100 data_access_exception);
101#endif
102
103 exc_register(TT_FP_DISABLED,
104 "fp_disabled", true,
105 fp_disabled);
106 exc_register(TT_FP_EXCEPTION_IEEE_754,
107 "fp_exception_ieee_754", false,
108 fp_exception_ieee_754);
109 exc_register(TT_FP_EXCEPTION_OTHER,
110 "fp_exception_other", false,
111 fp_exception_other);
112 exc_register(TT_TAG_OVERFLOW,
113 "tag_overflow", false,
114 tag_overflow);
115 exc_register(TT_DIVISION_BY_ZERO,
116 "division_by_zero", false,
117 division_by_zero);
118 exc_register(TT_DATA_ACCESS_EXCEPTION,
119 "data_access_exception", false,
120 data_access_exception);
121 exc_register(TT_DATA_ACCESS_ERROR,
122 "data_access_error", false,
123 data_access_error);
124 exc_register(TT_MEM_ADDRESS_NOT_ALIGNED,
125 "mem_address_not_aligned", false,
126 mem_address_not_aligned);
127 exc_register(TT_LDDF_MEM_ADDRESS_NOT_ALIGNED,
128 "LDDF_mem_address_not_aligned", false,
129 LDDF_mem_address_not_aligned);
130 exc_register(TT_STDF_MEM_ADDRESS_NOT_ALIGNED,
131 "STDF_mem_address_not_aligned", false,
132 STDF_mem_address_not_aligned);
133 exc_register(TT_PRIVILEGED_ACTION,
134 "privileged_action", false,
135 privileged_action);
136 exc_register(TT_LDQF_MEM_ADDRESS_NOT_ALIGNED,
137 "LDQF_mem_address_not_aligned", false,
138 LDQF_mem_address_not_aligned);
139 exc_register(TT_STQF_MEM_ADDRESS_NOT_ALIGNED,
140 "STQF_mem_address_not_aligned", false,
141 STQF_mem_address_not_aligned);
142
143 exc_register(TT_INTERRUPT_LEVEL_14,
144 "interrupt_level_14", true,
145 tick_interrupt);
146
147#ifdef SUN4U
148 exc_register(TT_INTERRUPT_VECTOR_TRAP,
149 "interrupt_vector_trap", true,
150 interrupt);
151#endif
152
153 exc_register(TT_FAST_INSTRUCTION_ACCESS_MMU_MISS,
154 "fast_instruction_access_mmu_miss", true,
155 fast_instruction_access_mmu_miss);
156 exc_register(TT_FAST_DATA_ACCESS_MMU_MISS,
157 "fast_data_access_mmu_miss", true,
158 fast_data_access_mmu_miss);
159 exc_register(TT_FAST_DATA_ACCESS_PROTECTION,
160 "fast_data_access_protection", true,
161 fast_data_access_protection);
162
163#ifdef SUN4V
164 exc_register(TT_CPU_MONDO,
165 "cpu_mondo", true,
166 cpu_mondo);
167#endif
168
169}
170
171/** @}
172 */
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