source: mainline/kernel/arch/sparc64/src/trap/interrupt.c@ 965dc18

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 965dc18 was 965dc18, checked in by Jakub Jermar <jakub@…>, 17 years ago

Merge sparc branch to trunk.

  • Property mode set to 100644
File size: 3.5 KB
RevLine 
[39494010]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[39494010]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[b6529ae]29/** @addtogroup sparc64interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[39494010]35#include <arch/interrupt.h>
[b3f8fb7]36#include <arch/sparc64.h>
[f9a56c0]37#include <arch/trap/interrupt.h>
[39494010]38#include <interrupt.h>
[7dcf22a]39#include <ddi/irq.h>
[c2b95d3]40#include <arch/types.h>
[39494010]41#include <debug.h>
[f9a56c0]42#include <arch/asm.h>
43#include <arch/barrier.h>
[253f35a1]44#include <print.h>
[00b38a3]45#include <arch.h>
46#include <mm/tlb.h>
47#include <config.h>
[e3890b3f]48#include <synch/spinlock.h>
[39494010]49
50/** Register Interrupt Level Handler.
51 *
52 * @param n Interrupt Level (1 - 15).
53 * @param name Short descriptive string.
54 * @param f Handler.
55 */
56void interrupt_register(int n, const char *name, iroutine f)
57{
58 ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);
59
60 exc_register(n - 1, name, f);
61}
[953b0f33]62
[0d107f31]63/** Process hardware interrupt.
64 *
65 * @param n Ignored.
66 * @param istate Ignored.
67 */
[6767c1d]68void interrupt(int n, istate_t *istate)
[f9a56c0]69{
[965dc18]70 uint64_t status;
[f9a56c0]71 uint64_t intrcv;
72 uint64_t data0;
[965dc18]73 status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
74 if (status & (!INTR_DISPATCH_STATUS_BUSY))
75 panic("Interrupt Dispatch Status busy bit not set\n");
[f9a56c0]76
77 intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
[965dc18]78#if defined (US)
79 data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
80#elif defined (US3)
81 data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
82#endif
[f9a56c0]83
[e3890b3f]84 irq_t *irq = irq_dispatch_and_lock(data0);
[0d107f31]85 if (irq) {
[f9a56c0]86 /*
[0d107f31]87 * The IRQ handler was found.
88 */
89 irq->handler(irq, irq->arg);
[8d2760f]90 /*
91 * See if there is a clear-interrupt-routine and call it.
92 */
93 if (irq->cir) {
94 irq->cir(irq->cir_arg, irq->inr);
95 }
[e3890b3f]96 spinlock_unlock(&irq->lock);
[0d107f31]97 } else if (data0 > config.base) {
98 /*
99 * This is a cross-call.
[454f1da]100 * data0 contains address of the kernel function.
[0d107f31]101 * We call the function only after we verify
[454f1da]102 * it is one of the supported ones.
[f9a56c0]103 */
[00b38a3]104#ifdef CONFIG_SMP
[0d107f31]105 if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
106 tlb_shootdown_ipi_recv();
[00b38a3]107 }
[0d107f31]108#endif
109 } else {
110 /*
111 * Spurious interrupt.
112 */
113#ifdef CONFIG_DEBUG
[f4c2b6a]114 printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
[8d2760f]115 ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
[0d107f31]116#endif
[f9a56c0]117 }
118
119 membar();
120 asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
121}
122
[3222efd]123/** @}
[b45c443]124 */
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