source: mainline/kernel/arch/sparc64/src/sun4v/sparc64.c@ aadf01e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since aadf01e was e0cb57b, checked in by Pavel Rimsky <pavel@…>, 16 years ago

MH cleanup

  • Property mode set to 100644
File size: 4.3 KB
RevLine 
[39cb79a]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[39cb79a]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[2f40fe4]29/** @addtogroup sparc64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[39cb79a]35#include <arch.h>
[65fb232]36#include <debug.h>
[ed166f7]37#include <config.h>
[49b6d32]38#include <arch/trap/trap.h>
[adb2ebf8]39#include <arch/console.h>
[b4655da]40#include <arch/sun4v/md.h>
[41d33ac]41#include <console/console.h>
[94d614e]42#include <arch/boot/boot.h>
[10b890b]43#include <arch/arch.h>
[9a5b556]44#include <arch/asm.h>
[ed166f7]45#include <arch/mm/page.h>
46#include <arch/stack.h>
[3a2f8aa]47#include <interrupt.h>
[16529d5]48#include <genarch/ofw/ofw_tree.h>
[ed166f7]49#include <userspace.h>
[7dcf22a]50#include <ddi/irq.h>
[f7734012]51#include <string.h>
[66e08d02]52#include <arch/drivers/niagara.h>
53
[94d614e]54bootinfo_t bootinfo;
[39cb79a]55
[06f96234]56/** Perform sparc64-specific initialization before main_bsp() is called. */
[cfa70add]57void arch_pre_main(void)
58{
[61e90dd]59 /* Copy init task info. */
[cfa70add]60 init.cnt = bootinfo.taskmap.count;
61
62 uint32_t i;
63
64 for (i = 0; i < bootinfo.taskmap.count; i++) {
[79f119b9]65 init.tasks[i].addr = (uintptr_t) bootinfo.taskmap.tasks[i].addr;
[cfa70add]66 init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
[f4b1535]67 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
68 bootinfo.taskmap.tasks[i].name);
[cfa70add]69 }
[b4655da]70
71 md_init();
[cfa70add]72}
73
[771cd22]74/** Perform sparc64 specific initialization before mm is initialized. */
[39cb79a]75void arch_pre_mm_init(void)
76{
[a9ac978]77 if (config.cpu_active == 1)
78 trap_init();
[39cb79a]79}
80
[771cd22]81/** Perform sparc64 specific initialization afterr mm is initialized. */
[39cb79a]82void arch_post_mm_init(void)
83{
[0d107f31]84 if (config.cpu_active == 1) {
[771cd22]85 /*
86 * We have 2^11 different interrupt vectors.
87 * But we only create 128 buckets.
88 */
89 irq_init(1 << 11, 128);
[0d107f31]90 }
[39cb79a]91}
92
[26678e5]93void arch_post_cpu_init(void)
94{
95}
96
[7453929]97void arch_pre_smp_init(void)
98{
99}
100
101void arch_post_smp_init(void)
[39cb79a]102{
[69b68d1f]103 niagarain_init();
[39cb79a]104}
105
[9a5b556]106/** Calibrate delay loop.
107 *
108 * On sparc64, we implement delay() by waiting for the TICK register to
109 * reach a pre-computed value, as opposed to performing some pre-computed
110 * amount of instructions of known duration. We set the delay_loop_const
111 * to 1 in order to neutralize the multiplication done by delay().
112 */
[39cb79a]113void calibrate_delay_loop(void)
114{
[9a5b556]115 CPU->delay_loop_const = 1;
116}
117
118/** Wait several microseconds.
119 *
120 * We assume that interrupts are already disabled.
121 *
122 * @param t Microseconds to wait.
123 */
124void asm_delay_loop(const uint32_t usec)
125{
[aeaebcc]126 uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t)
[f619ec11]127 CPU->arch.clock_frequency / 1000000;
[9a5b556]128
129 while (tick_read() < stop)
130 ;
[39cb79a]131}
[41d33ac]132
[ed166f7]133/** Switch to userspace. */
134void userspace(uspace_arg_t *kernel_uarg)
135{
[8688a6e]136 (void) interrupts_disable();
[ed166f7]137 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
[f619ec11]138 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE
139 - (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
140 (uintptr_t) kernel_uarg->uspace_uarg);
[ed166f7]141
142 for (;;)
143 ;
144 /* not reached */
145}
146
[f74bbaf]147void arch_reboot(void)
148{
149 // TODO
150 while (1);
151}
152
[6da1013f]153/** Construct function pointer
154 *
155 * @param fptr function pointer structure
156 * @param addr function address
157 * @param caller calling function address
158 *
159 * @return address of the function pointer
160 *
161 */
162void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
163{
164 return addr;
165}
166
[3a2f8aa]167void irq_initialize_arch(irq_t *irq)
168{
169 (void) irq;
170}
171
[2f40fe4]172/** @}
[b45c443]173 */
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