source: mainline/kernel/arch/sparc64/src/sun4u/sparc64.c@ b352895

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b352895 was b473611, checked in by Jakub Jermar <jakub@…>, 15 years ago

Merge the sparc branch.
Both sun4u and sun4v appear to work.
HM cleanup is pending.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <debug.h>
37#include <config.h>
38#include <arch/trap/trap.h>
39#include <arch/console.h>
40#include <console/console.h>
41#include <arch/boot/boot.h>
42#include <arch/arch.h>
43#include <arch/asm.h>
44#include <arch/mm/page.h>
45#include <arch/stack.h>
46#include <interrupt.h>
47#include <genarch/ofw/ofw_tree.h>
48#include <userspace.h>
49#include <ddi/irq.h>
50#include <string.h>
51
52bootinfo_t bootinfo;
53
54/** Perform sparc64-specific initialization before main_bsp() is called. */
55void arch_pre_main(void)
56{
57 /* Copy init task info. */
58 init.cnt = bootinfo.taskmap.count;
59
60 uint32_t i;
61
62 for (i = 0; i < bootinfo.taskmap.count; i++) {
63 init.tasks[i].addr = (uintptr_t) bootinfo.taskmap.tasks[i].addr;
64 init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
65 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
66 bootinfo.taskmap.tasks[i].name);
67 }
68
69 /* Copy boot allocations info. */
70 ballocs.base = bootinfo.ballocs.base;
71 ballocs.size = bootinfo.ballocs.size;
72
73 ofw_tree_init(bootinfo.ofw_root);
74}
75
76/** Perform sparc64 specific initialization before mm is initialized. */
77void arch_pre_mm_init(void)
78{
79 if (config.cpu_active == 1)
80 trap_init();
81}
82
83/** Perform sparc64 specific initialization afterr mm is initialized. */
84void arch_post_mm_init(void)
85{
86 if (config.cpu_active == 1) {
87 /*
88 * We have 2^11 different interrupt vectors.
89 * But we only create 128 buckets.
90 */
91 irq_init(1 << 11, 128);
92 }
93}
94
95void arch_post_cpu_init(void)
96{
97}
98
99void arch_pre_smp_init(void)
100{
101}
102
103void arch_post_smp_init(void)
104{
105 standalone_sparc64_console_init();
106}
107
108/** Calibrate delay loop.
109 *
110 * On sparc64, we implement delay() by waiting for the TICK register to
111 * reach a pre-computed value, as opposed to performing some pre-computed
112 * amount of instructions of known duration. We set the delay_loop_const
113 * to 1 in order to neutralize the multiplication done by delay().
114 */
115void calibrate_delay_loop(void)
116{
117 CPU->delay_loop_const = 1;
118}
119
120/** Wait several microseconds.
121 *
122 * We assume that interrupts are already disabled.
123 *
124 * @param t Microseconds to wait.
125 */
126void asm_delay_loop(const uint32_t usec)
127{
128 uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t)
129 CPU->arch.clock_frequency / 1000000;
130
131 while (tick_read() < stop)
132 ;
133}
134
135/** Switch to userspace. */
136void userspace(uspace_arg_t *kernel_uarg)
137{
138 (void) interrupts_disable();
139 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
140 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE
141 - (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
142 (uintptr_t) kernel_uarg->uspace_uarg);
143
144 for (;;)
145 ;
146 /* not reached */
147}
148
149void arch_reboot(void)
150{
151 // TODO
152 while (1);
153}
154
155/** Construct function pointer
156 *
157 * @param fptr function pointer structure
158 * @param addr function address
159 * @param caller calling function address
160 *
161 * @return address of the function pointer
162 *
163 */
164void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
165{
166 return addr;
167}
168
169void irq_initialize_arch(irq_t *irq)
170{
171 (void) irq;
172}
173
174/** @}
175 */
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