source: mainline/kernel/arch/sparc64/src/sun4u/sparc64.c@ a52e2f4

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a52e2f4 was ec443d5, checked in by Jakub Jermar <jakub@…>, 11 years ago

Let most of the sparc64 traps go through exc_dispatch().

  • All interrupts (level and vector_trap) now use exc_dispatch().
  • Fast MMU traps still don't use it.
  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <debug.h>
37#include <config.h>
38#include <macros.h>
39#include <arch/trap/trap.h>
40#include <arch/console.h>
41#include <console/console.h>
42#include <arch/boot/boot.h>
43#include <arch/arch.h>
44#include <arch/asm.h>
45#include <arch/mm/page.h>
46#include <arch/stack.h>
47#include <interrupt.h>
48#include <genarch/ofw/ofw_tree.h>
49#include <userspace.h>
50#include <ddi/irq.h>
51#include <str.h>
52#include <sysinfo/sysinfo.h>
53
54memmap_t memmap;
55
56/** Perform sparc64-specific initialization before main_bsp() is called. */
57void arch_pre_main(bootinfo_t *bootinfo)
58{
59 /* Copy init task info. */
60 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
61
62 size_t i;
63 for (i = 0; i < init.cnt; i++) {
64 init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr);
65 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
66 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
67 bootinfo->taskmap.tasks[i].name);
68 }
69
70 /* Copy physical memory map. */
71 memmap.total = bootinfo->memmap.total;
72 memmap.cnt = min(bootinfo->memmap.cnt, MEMMAP_MAX_RECORDS);
73 for (i = 0; i < memmap.cnt; i++) {
74 memmap.zones[i].start = bootinfo->memmap.zones[i].start;
75 memmap.zones[i].size = bootinfo->memmap.zones[i].size;
76 }
77
78 /* Copy boot allocations info. */
79 ballocs.base = bootinfo->ballocs.base;
80 ballocs.size = bootinfo->ballocs.size;
81
82 ofw_tree_init(bootinfo->ofw_root);
83}
84
85/** Perform sparc64 specific initialization before mm is initialized. */
86void arch_pre_mm_init(void)
87{
88 if (config.cpu_active == 1) {
89 trap_init();
90 exc_arch_init();
91 }
92}
93
94/** Perform sparc64 specific initialization afterr mm is initialized. */
95void arch_post_mm_init(void)
96{
97 if (config.cpu_active == 1) {
98 /* Map OFW information into sysinfo */
99 ofw_sysinfo_map();
100
101 /*
102 * We have 2^11 different interrupt vectors.
103 * But we only create 128 buckets.
104 */
105 irq_init(1 << 11, 128);
106 }
107}
108
109void arch_post_cpu_init(void)
110{
111}
112
113void arch_pre_smp_init(void)
114{
115}
116
117void arch_post_smp_init(void)
118{
119 /* Currently the only supported platform for sparc64/sun4u is 'sun4u'. */
120 static const char *platform = "sun4u";
121
122 sysinfo_set_item_data("platform", NULL, (void *) platform,
123 str_size(platform));
124
125 standalone_sparc64_console_init();
126}
127
128/** Calibrate delay loop.
129 *
130 * On sparc64, we implement delay() by waiting for the TICK register to
131 * reach a pre-computed value, as opposed to performing some pre-computed
132 * amount of instructions of known duration. We set the delay_loop_const
133 * to 1 in order to neutralize the multiplication done by delay().
134 */
135void calibrate_delay_loop(void)
136{
137 CPU->delay_loop_const = 1;
138}
139
140/** Wait several microseconds.
141 *
142 * We assume that interrupts are already disabled.
143 *
144 * @param t Microseconds to wait.
145 */
146void asm_delay_loop(const uint32_t usec)
147{
148 uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t)
149 CPU->arch.clock_frequency / 1000000;
150
151 while (tick_read() < stop)
152 ;
153}
154
155/** Switch to userspace. */
156void userspace(uspace_arg_t *kernel_uarg)
157{
158 (void) interrupts_disable();
159 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
160 ((uintptr_t) kernel_uarg->uspace_stack) +
161 kernel_uarg->uspace_stack_size -
162 (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
163 (uintptr_t) kernel_uarg->uspace_uarg);
164
165 /* Not reached */
166 while (1);
167}
168
169void arch_reboot(void)
170{
171 // TODO
172 while (1);
173}
174
175/** Construct function pointer
176 *
177 * @param fptr function pointer structure
178 * @param addr function address
179 * @param caller calling function address
180 *
181 * @return address of the function pointer
182 *
183 */
184void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
185{
186 return addr;
187}
188
189void irq_initialize_arch(irq_t *irq)
190{
191 (void) irq;
192}
193
194/** @}
195 */
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