1 | /*
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2 | * Copyright (c) 2006 Jakub Jermar
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3 | * Copyright (c) 2009 Pavel Rimsky
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4 | * All rights reserved.
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5 | *
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6 | * Redistribution and use in source and binary forms, with or without
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7 | * modification, are permitted provided that the following conditions
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8 | * are met:
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9 | *
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10 | * - Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions and the following disclaimer.
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12 | * - Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | * - The name of the author may not be used to endorse or promote products
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16 | * derived from this software without specific prior written permission.
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17 | *
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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28 | */
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29 |
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30 | /** @addtogroup sparc64
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31 | * @{
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32 | */
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33 | /** @file
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34 | */
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35 |
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36 | #include <smp/smp.h>
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37 | #include <smp/ipi.h>
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38 | #include <genarch/ofw/ofw_tree.h>
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39 | #include <cpu.h>
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40 | #include <arch/cpu.h>
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41 | #include <arch/boot/boot.h>
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42 | #include <arch.h>
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43 | #include <config.h>
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44 | #include <macros.h>
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45 | #include <func.h>
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46 | #include <arch/types.h>
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47 | #include <synch/synch.h>
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48 | #include <synch/waitq.h>
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49 | #include <print.h>
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50 | #include <arch/sun4v/hypercall.h>
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51 | #include <arch/sun4v/md.h>
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52 | #include <arch/sun4v/ipi.h>
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53 | #include <time/delay.h>
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54 | #include <arch/smp/sun4v/smp.h>
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55 | #include <string.h>
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56 |
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57 | /** hypervisor code of the "running" state of the CPU */
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58 | #define CPU_STATE_RUNNING 2
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59 |
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60 | /** maximum possible number of processor cores */
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61 | #define MAX_NUM_CORES 8
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62 |
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63 | /** needed in the CPU_START hypercall */
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64 | extern void kernel_image_start(void);
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65 |
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66 | /** needed in the CPU_START hypercall */
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67 | extern void *trap_table;
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68 |
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69 | /** number of execution units detected */
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70 | uint8_t exec_unit_count = 0;
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71 |
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72 | /** execution units (processor cores) */
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73 | exec_unit_t exec_units[MAX_NUM_CORES];
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74 |
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75 | /** CPU structures */
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76 | extern cpu_t *cpus;
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77 |
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78 | /** maximum number of strands per a physical core detected */
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79 | unsigned int max_core_strands = 0;
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80 |
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81 | #ifdef CONFIG_SIMICS_SMP_HACK
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82 | /**
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83 | * Copies a piece of HelenOS code to the place where OBP had its IPI handler.
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84 | * By sending an IPI by the BSP to the AP the code will be executed.
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85 | * The code will jump to the first instruction of the kernel. This is
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86 | * a workaround how to make APs execute HelenOS code on Simics.
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87 | */
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88 | static void simics_smp_hack_init(void) {
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89 | asm volatile (
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90 | "setx temp_cpu_mondo_handler, %g4, %g6 \n"
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91 | "setx 0x80200f80, %g4, %g7 \n"
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92 |
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93 | "ldx [%g6], %g4 \n"
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94 | "stxa %g4, [%g7] 0x14 \n"
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95 | "membar #Sync \n"
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96 |
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97 | "add %g7, 0x8, %g7 \n"
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98 | "ldx [%g6 + 0x8], %g4 \n"
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99 | "stxa %g4, [%g7] 0x14 \n"
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100 | "membar #Sync \n"
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101 |
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102 | "add %g7, 0x8, %g7 \n"
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103 | "ldx [%g6 + 0x10], %g4 \n"
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104 | "stxa %g4, [%g7] 0x14 \n"
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105 | "membar #Sync \n"
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106 |
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107 | "add %g7, 0x8, %g7 \n"
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108 | "ldx [%g6 + 0x18], %g4 \n"
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109 | "stxa %g4, [%g7] 0x14 \n"
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110 | "membar #Sync \n"
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111 |
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112 | "add %g7, 0x8, %g7 \n"
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113 | "ldx [%g6 + 0x20], %g4 \n"
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114 | "stxa %g4, [%g7] 0x14 \n"
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115 | "membar #Sync \n"
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116 |
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117 | "add %g7, 0x8, %g7 \n"
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118 | "ldx [%g6 + 0x28], %g4 \n"
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119 | "stxa %g4, [%g7] 0x14 \n"
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120 | "membar #Sync \n"
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121 |
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122 | "add %g7, 0x8, %g7 \n"
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123 | "ldx [%g6 + 0x30], %g4 \n"
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124 | "stxa %g4, [%g7] 0x14 \n"
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125 | "membar #Sync \n"
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126 |
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127 | "add %g7, 0x8, %g7 \n"
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128 | "ldx [%g6 + 0x38], %g4 \n"
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129 | "stxa %g4, [%g7] 0x14 \n"
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130 | "membar #Sync \n"
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131 |
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132 | "add %g7, 0x8, %g7 \n"
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133 | "ldx [%g6 + 0x40], %g4 \n"
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134 | "stxa %g4, [%g7] 0x14 \n"
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135 | "membar #Sync \n"
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136 |
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137 | "flush %i7"
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138 |
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139 | );
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140 | }
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141 | #endif
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142 |
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143 | #if 0
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144 | /**
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145 | * Proposes the optimal number of ready threads for each virtual processor
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146 | * in the given processor core so that the processor core is as busy as the
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147 | * average processor core. The proposed number of ready threads will be
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148 | * stored to the proposed_nrdy variable of the cpu_arch_t struture.
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149 | */
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150 | bool calculate_optimal_nrdy(exec_unit_t *exec_unit) {
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151 |
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152 | /* calculate the number of threads the core will steal */
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153 | int avg = atomic_get(&nrdy) / exec_unit_count;
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154 | int to_steal = avg - atomic_get(&(exec_units->nrdy));
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155 | if (to_steal < 0) {
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156 | return true;
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157 | } else if (to_steal == 0) {
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158 | return false;
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159 | }
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160 |
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161 | /* initialize the proposals with the real numbers of ready threads */
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162 | unsigned int k;
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163 | for (k = 0; k < exec_unit->strand_count; k++) {
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164 | exec_units->cpus[k]->arch.proposed_nrdy =
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165 | atomic_get(&(exec_unit->cpus[k]->nrdy));
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166 | }
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167 |
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168 | /* distribute the threads to be stolen to the core's CPUs */
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169 | int j;
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170 | for (j = to_steal; j > 0; j--) {
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171 | unsigned int k;
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172 | unsigned int least_busy = 0;
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173 | unsigned int least_busy_nrdy =
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174 | exec_unit->cpus[0]->arch.proposed_nrdy;
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175 |
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176 | /* for each stolen thread, give it to the least busy CPU */
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177 | for (k = 0; k < exec_unit->strand_count; k++) {
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178 | if (exec_unit->cpus[k]->arch.proposed_nrdy
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179 | < least_busy_nrdy) {
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180 | least_busy = k;
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181 | least_busy_nrdy =
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182 | exec_unit->cpus[k]->arch.proposed_nrdy;
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183 | }
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184 | }
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185 | exec_unit->cpus[least_busy]->arch.proposed_nrdy++;
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186 | }
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187 |
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188 | return false;
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189 | }
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190 | #endif
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191 |
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192 | /**
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193 | * Finds out which execution units belong to particular CPUs. By execution unit
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194 | * we mean the physical core the logical processor is backed by. Since each
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195 | * Niagara physical core has just one integer execution unit and we will
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196 | * ignore other execution units than the integer ones, we will use the terms
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197 | * "integer execution unit", "execution unit" and "physical core"
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198 | * interchangeably.
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199 | *
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200 | * The physical cores are detected by browsing the children of the CPU node
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201 | * in the machine description and looking for a node representing an integer
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202 | * execution unit. Once the integer execution unit of a particular CPU is
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203 | * known, the ID of the CPU is added to the list of cpuids of the corresponding
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204 | * execution unit structure (exec_unit_t). If an execution unit is encountered
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205 | * for the first time, a new execution unit structure (exec_unit_t) must be
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206 | * created first and added to the execution units array (exec_units).
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207 | *
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208 | * If the function fails to find an execution unit for a CPU (this may happen
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209 | * on machines with older firmware or on Simics), it performs a fallback code
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210 | * which pretends there exists just one execution unit and all CPUs belong to
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211 | * it.
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212 | *
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213 | * Finally, the array of all execution units is reordered such that its element
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214 | * which represents the physical core of the the bootstrap CPU is at index 0.
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215 | * Moreover, the array of CPU IDs within the BSP's physical core structure is
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216 | * reordered such that the element which represents the ID of the BSP is at
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217 | * index 0. This is done because we would like the CPUs to be woken up
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218 | * such that the 0-index CPU of the 0-index execution unit is
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219 | * woken up first. And since the BSP is already woken up, we would like it to be
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220 | * at 0-th position of the 0-th execution unit structure.
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221 | *
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222 | * Apart from that, the code also counts the total number of CPUs and stores
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223 | * it to the global config.cpu_count variable.
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224 | */
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225 | static void detect_execution_units(void)
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226 | {
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227 | /* ID of the bootstrap processor */
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228 | uint64_t myid;
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229 |
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230 | /* total number of CPUs detected */
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231 | size_t cpu_count = 0;
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232 |
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233 | /* will be set to 1 if detecting the physical cores fails */
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234 | bool exec_unit_assign_error = 0;
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235 |
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236 | /* index of the bootstrap physical core in the array of cores */
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237 | unsigned int bsp_exec_unit_index = 0;
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238 |
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239 | /* index of the BSP ID inside the array of bootstrap core's cpuids */
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240 | unsigned int bsp_core_strand_index = 0;
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241 |
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242 | __hypercall_fast_ret1(0, 0, 0, 0, 0, CPU_MYID, &myid);
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243 | md_node_t node = md_get_root();
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244 |
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245 | /* walk through all the CPU nodes in the MD*/
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246 | while (md_next_node(&node, "cpu")) {
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247 |
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248 | uint64_t cpuid;
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249 | md_get_integer_property(node, "id", &cpuid);
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250 | cpu_count++;
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251 |
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252 | /*
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253 | * if failed in previous CPUs, don't try
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254 | * to detect physical cores any more
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255 | */
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256 | if (exec_unit_assign_error)
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257 | continue;
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258 |
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259 | /* detect exec. unit for the CPU represented by current node */
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260 | uint64_t exec_unit_id = 0;
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261 | md_child_iter_t it = md_get_child_iterator(node);
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262 |
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263 | while (md_next_child(&it)) {
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264 | md_node_t child = md_get_child_node(it);
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265 | const char *exec_unit_type;
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266 | md_get_string_property(child, "type", &exec_unit_type);
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267 |
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268 | /* each physical core has just 1 integer exec. unit */
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269 | if (str_cmp(exec_unit_type, "integer") == 0) {
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270 | exec_unit_id = child;
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271 | break;
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272 | }
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273 | }
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274 |
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275 | /* execution unit detected successfully */
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276 | if (exec_unit_id != 0) {
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277 |
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278 | /* find the exec. unit in array of existing units */
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279 | unsigned int i = 0;
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280 | for (i = 0; i < exec_unit_count; i++) {
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281 | if (exec_units[i].exec_unit_id == exec_unit_id)
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282 | break;
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283 | }
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284 |
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285 | /*
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286 | * execution unit just met has not been met before, so
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287 | * create a new entry in array of all execution units
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288 | */
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289 | if (i == exec_unit_count) {
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290 | exec_units[i].exec_unit_id = exec_unit_id;
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291 | exec_units[i].strand_count = 0;
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292 | atomic_set(&(exec_units[i].nrdy), 0);
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293 | spinlock_initialize(&(exec_units[i].proposed_nrdy_lock), "proposed nrdy lock");
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294 | exec_unit_count++;
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295 | }
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296 |
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297 | /*
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298 | * remember the exec. unit and strand of the BSP
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299 | */
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300 | if (cpuid == myid) {
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301 | bsp_exec_unit_index = i;
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302 | bsp_core_strand_index = exec_units[i].strand_count;
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303 | }
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304 |
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305 | /* add the CPU just met to the exec. unit's list */
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306 | exec_units[i].cpuids[exec_units[i].strand_count] = cpuid;
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307 | exec_units[i].strand_count++;
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308 | max_core_strands =
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309 | exec_units[i].strand_count > max_core_strands ?
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310 | exec_units[i].strand_count : max_core_strands;
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311 |
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312 | /* detecting execution unit failed */
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313 | } else {
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314 | exec_unit_assign_error = 1;
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315 | }
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316 | }
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317 |
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318 | /* save the number of CPUs to a globally accessible variable */
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319 | config.cpu_count = cpu_count;
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320 |
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321 | /*
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322 | * A fallback code which will be executed if finding out which
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323 | * execution units belong to particular CPUs fails. Pretend there
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324 | * exists just one execution unit and all CPUs belong to it.
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325 | */
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326 | if (exec_unit_assign_error) {
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327 | bsp_exec_unit_index = 0;
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328 | exec_unit_count = 1;
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329 | exec_units[0].strand_count = cpu_count;
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330 | exec_units[0].exec_unit_id = 1;
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331 | spinlock_initialize(&(exec_units[0].proposed_nrdy_lock), "proposed nrdy lock");
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332 | atomic_set(&(exec_units[0].nrdy), 0);
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333 | max_core_strands = cpu_count;
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334 |
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335 | /* browse CPUs again, assign them the fictional exec. unit */
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336 | node = md_get_root();
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337 | unsigned int i = 0;
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338 |
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339 | while (md_next_node(&node, "cpu")) {
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340 | uint64_t cpuid;
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341 | md_get_integer_property(node, "id", &cpuid);
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342 | if (cpuid == myid) {
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343 | bsp_core_strand_index = i;
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344 | }
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345 | exec_units[0].cpuids[i++] = cpuid;
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346 | }
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347 | }
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348 |
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349 | /*
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350 | * Reorder the execution units array elements and the cpuid array
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351 | * elements so that the BSP will always be the very first CPU of
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352 | * the very first execution unit.
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353 | */
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354 | exec_unit_t temp_exec_unit = exec_units[0];
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355 | exec_units[0] = exec_units[bsp_exec_unit_index];
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356 | exec_units[bsp_exec_unit_index] = temp_exec_unit;
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357 |
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358 | uint64_t temp_cpuid = exec_units[0].cpuids[0];
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359 | exec_units[0].cpuids[0] = exec_units[0].cpuids[bsp_exec_unit_index];
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360 | exec_units[0].cpuids[bsp_core_strand_index] = temp_cpuid;
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361 |
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362 | }
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363 |
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364 | /**
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365 | * Determine number of processors and detect physical cores. On Simics
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366 | * copy the code which will be executed by the AP when the BSP sends an
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367 | * IPI to it in order to make it execute HelenOS code.
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368 | */
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369 | void smp_init(void)
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370 | {
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371 | detect_execution_units();
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372 | #ifdef CONFIG_SIMICS_SMP_HACK
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373 | simics_smp_hack_init();
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374 | #endif
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375 | }
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376 |
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377 | /**
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378 | * For each CPU sets the value of cpus[i].arch.id, where i is the
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379 | * index of the CPU in the cpus variable, to the cpuid of the i-th processor
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380 | * to be run. The CPUs are run such that the CPU represented by cpus[0]
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381 | * is run first, cpus[1] is run after it, and cpus[cpu_count - 1] is run as the
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382 | * last one.
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383 | *
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384 | * The CPU IDs are set such that during waking the CPUs up the
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385 | * processor cores will be alternated, i.e. first one CPU from the first core
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386 | * will be run, after that one CPU from the second CPU core will be run,...
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387 | * then one CPU from the last core will be run, after that another CPU
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388 | * from the first core will be run, then another CPU from the second core
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389 | * will be run,... then another CPU from the last core will be run, and so on.
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390 | */
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391 | static void init_cpuids(void)
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392 | {
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393 | unsigned int cur_core_strand;
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394 | unsigned int cur_core;
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395 | unsigned int cur_cpu = 0;
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396 |
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397 | for (cur_core_strand = 0; cur_core_strand < max_core_strands; cur_core_strand++) {
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398 | for (cur_core = 0; cur_core < exec_unit_count; cur_core++) {
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399 | if (cur_core_strand > exec_units[cur_core].strand_count)
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400 | continue;
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401 |
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402 | cpus[cur_cpu].arch.exec_unit = &(exec_units[cur_core]);
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403 | atomic_add(&(exec_units[cur_core].nrdy), atomic_get(&(cpus[cur_cpu].nrdy)));
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404 | cpus[cur_cpu].arch.id = exec_units[cur_core].cpuids[cur_core_strand];
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405 | exec_units[cur_core].cpus[cur_core_strand] = &(cpus[cur_cpu]);
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406 | cur_cpu++;
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407 | }
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408 | }
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409 | }
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410 |
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411 | /**
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412 | * Wakes up a single CPU.
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413 | *
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414 | * @param cpuid ID of the CPU to be woken up
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415 | */
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416 | static bool wake_cpu(uint64_t cpuid)
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417 | {
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418 |
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419 | #ifdef CONFIG_SIMICS_SMP_HACK
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420 | ipi_unicast_to((void (*)(void)) 1234, cpuid);
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421 | #else
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422 | /* stop the CPU before making it execute our code */
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423 | if (__hypercall_fast1(CPU_STOP, cpuid) != EOK)
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424 | return false;
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425 |
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426 | /* wait for the CPU to stop */
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427 | uint64_t state;
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428 | __hypercall_fast_ret1(cpuid, 0, 0, 0, 0,
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429 | CPU_STATE, &state);
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430 | while (state == CPU_STATE_RUNNING) {
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431 | __hypercall_fast_ret1(cpuid, 0, 0, 0, 0,
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432 | CPU_STATE, &state);
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433 | }
|
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434 |
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435 | /* make the CPU run again and execute HelenOS code */
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436 | if (__hypercall_fast4(
|
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437 | CPU_START, cpuid,
|
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438 | (uint64_t) KA2PA(kernel_image_start),
|
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439 | KA2PA(trap_table), bootinfo.physmem_start
|
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440 | ) != EOK)
|
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441 | return false;
|
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442 | #endif
|
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443 |
|
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444 | if (waitq_sleep_timeout(&ap_completion_wq, 10000000, SYNCH_FLAGS_NONE) ==
|
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445 | ESYNCH_TIMEOUT)
|
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446 | printf("%s: waiting for processor (cpuid = %" PRIu32
|
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447 | ") timed out\n", __func__, cpuid);
|
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448 |
|
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449 | return true;
|
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450 | }
|
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451 |
|
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452 | /** Wake application processors up. */
|
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453 | void kmp(void *arg)
|
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454 | {
|
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455 | init_cpuids();
|
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456 |
|
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457 | unsigned int i;
|
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458 |
|
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459 | for (i = 1; i < config.cpu_count; i++) {
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460 | wake_cpu(cpus[i].arch.id);
|
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461 | }
|
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462 | }
|
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463 |
|
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464 | /** @}
|
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465 | */
|
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