source: mainline/kernel/arch/sparc64/src/mm/page.c@ 9a8baed

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9a8baed was f8ddd17, checked in by Jakub Jermar <jakub@…>, 19 years ago

Rework support for virtually indexed cache.
Instead of repeatedly flushing the data cache, which was a huge overkill, refuse to create an illegal address alias
in the kernel (again) and allocate appropriate page color in userspace instead. Extend the detection also to
SYS_PHYSMEM_MAP syscall.

Add support for tracking physical memory areas mappable by SYS_PHYSMEM_MAP.

Lots of coding style changes.

  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64mm
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/mm/page.h>
36#include <arch/mm/tlb.h>
37#include <genarch/mm/page_ht.h>
38#include <mm/frame.h>
39#include <arch/mm/frame.h>
40#include <bitops.h>
41#include <debug.h>
42#include <align.h>
43#include <config.h>
44
45#ifdef CONFIG_SMP
46/** Entries locked in DTLB of BSP.
47 *
48 * Application processors need to have the same locked entries
49 * in their DTLBs as the bootstrap processor.
50 */
51static struct {
52 uintptr_t virt_page;
53 uintptr_t phys_page;
54 int pagesize_code;
55} bsp_locked_dtlb_entry[DTLB_ENTRY_COUNT];
56
57/** Number of entries in bsp_locked_dtlb_entry array. */
58static count_t bsp_locked_dtlb_entries = 0;
59#endif /* CONFIG_SMP */
60
61/** Perform sparc64 specific initialization of paging. */
62void page_arch_init(void)
63{
64 if (config.cpu_active == 1) {
65 page_mapping_operations = &ht_mapping_operations;
66 } else {
67
68#ifdef CONFIG_SMP
69 int i;
70
71 /*
72 * Copy locked DTLB entries from the BSP.
73 */
74 for (i = 0; i < bsp_locked_dtlb_entries; i++) {
75 dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
76 bsp_locked_dtlb_entry[i].phys_page,
77 bsp_locked_dtlb_entry[i].pagesize_code, true,
78 false);
79 }
80#endif
81
82 }
83}
84
85/** Map memory-mapped device into virtual memory.
86 *
87 * So far, only DTLB is used to map devices into memory.
88 * Chances are that there will be only a limited amount of
89 * devices that the kernel itself needs to lock in DTLB.
90 *
91 * @param physaddr Physical address of the page where the
92 * device is located. Must be at least
93 * page-aligned.
94 * @param size Size of the device's registers. Must not
95 * exceed 4M and must include extra space
96 * caused by the alignment.
97 *
98 * @return Virtual address of the page where the device is
99 * mapped.
100 */
101uintptr_t hw_map(uintptr_t physaddr, size_t size)
102{
103 unsigned int order;
104 int i;
105
106 ASSERT(config.cpu_active == 1);
107
108 struct {
109 int pagesize_code;
110 size_t increment;
111 count_t count;
112 } sizemap[] = {
113 { PAGESIZE_8K, 0, 1 }, /* 8K */
114 { PAGESIZE_8K, PAGE_SIZE, 2 }, /* 16K */
115 { PAGESIZE_8K, PAGE_SIZE, 4 }, /* 32K */
116 { PAGESIZE_64K, 0, 1}, /* 64K */
117 { PAGESIZE_64K, 8*PAGE_SIZE, 2 }, /* 128K */
118 { PAGESIZE_64K, 8*PAGE_SIZE, 4 }, /* 256K */
119 { PAGESIZE_512K, 0, 1 }, /* 512K */
120 { PAGESIZE_512K, 64*PAGE_SIZE, 2 }, /* 1M */
121 { PAGESIZE_512K, 64*PAGE_SIZE, 4 }, /* 2M */
122 { PAGESIZE_4M, 0, 1 }, /* 4M */
123 { PAGESIZE_4M, 512*PAGE_SIZE, 2 } /* 8M */
124 };
125
126 ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr);
127 ASSERT(size <= 8*1024*1024);
128
129 if (size <= FRAME_SIZE)
130 order = 0;
131 else
132 order = (fnzb64(size - 1) + 1) - FRAME_WIDTH;
133
134 /*
135 * Use virtual addresses that are beyond the limit of physical memory.
136 * Thus, the physical address space will not be wasted by holes created
137 * by frame_alloc().
138 */
139 ASSERT(PA2KA(last_frame));
140 uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame), 1 << (order + FRAME_WIDTH));
141 last_frame = ALIGN_UP(KA2PA(virtaddr) + size, 1 << (order + FRAME_WIDTH));
142
143 for (i = 0; i < sizemap[order].count; i++) {
144 /*
145 * First, insert the mapping into DTLB.
146 */
147 dtlb_insert_mapping(virtaddr + i*sizemap[order].increment,
148 physaddr + i*sizemap[order].increment,
149 sizemap[order].pagesize_code, true, false);
150
151#ifdef CONFIG_SMP
152 /*
153 * Second, save the information about the mapping for APs.
154 */
155 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
156 virtaddr + i*sizemap[order].increment;
157 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
158 physaddr + i*sizemap[order].increment;
159 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
160 sizemap[order].pagesize_code;
161 bsp_locked_dtlb_entries++;
162#endif
163 }
164
165 return virtaddr;
166}
167
168/** @}
169 */
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