source: mainline/kernel/arch/sparc64/src/mm/page.c@ 84060e2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 84060e2 was 84060e2, checked in by Jakub Jermar <jakub@…>, 19 years ago

sparc64 work:

  • hw_map() can now support up to 8M requests
  • CPU stacks are now locked in DTLB of the respective processor
  • kernel in the boot phase no longer relies on the stack provided by OpenFirmware
  • instead of of doing FLUSHW during kernel startup, simply set the window state registers to the wanted state
  • NWINDOW → NWINDOWS
  • Add/fix some comments and copyrights.
  • Property mode set to 100644
File size: 5.0 KB
RevLine 
[437ee6a4]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[c6e314a]29/** @addtogroup sparc64mm
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[437ee6a4]35#include <arch/mm/page.h>
[c1982e45]36#include <arch/mm/tlb.h>
[6d7ffa65]37#include <genarch/mm/page_ht.h>
[c1982e45]38#include <mm/frame.h>
[c6e314a]39#include <arch/mm/frame.h>
[c1982e45]40#include <bitops.h>
[82da5f5]41#include <debug.h>
[c6e314a]42#include <align.h>
[a9ac978]43#include <config.h>
[437ee6a4]44
[a9ac978]45#ifdef CONFIG_SMP
46/** Entries locked in DTLB of BSP.
47 *
48 * Application processors need to have the same locked entries
49 * in their DTLBs as the bootstrap processor.
50 */
51static struct {
52 uintptr_t virt_page;
53 uintptr_t phys_page;
54 int pagesize_code;
55} bsp_locked_dtlb_entry[DTLB_ENTRY_COUNT];
56
57/** Number of entries in bsp_locked_dtlb_entry array. */
58static count_t bsp_locked_dtlb_entries = 0;
59#endif /* CONFIG_SMP */
60
61/** Perform sparc64 specific initialization of paging. */
[437ee6a4]62void page_arch_init(void)
63{
[a9ac978]64 if (config.cpu_active == 1) {
65 page_mapping_operations = &ht_mapping_operations;
66 } else {
67
68#ifdef CONFIG_SMP
69 int i;
70
71 /*
72 * Copy locked DTLB entries from the BSP.
73 */
74 for (i = 0; i < bsp_locked_dtlb_entries; i++) {
75 dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
76 bsp_locked_dtlb_entry[i].phys_page, bsp_locked_dtlb_entry[i].pagesize_code,
77 true, false);
78 }
79#endif
80
81 }
[437ee6a4]82}
[c1982e45]83
[da74747]84/** Map memory-mapped device into virtual memory.
85 *
86 * So far, only DTLB is used to map devices into memory.
87 * Chances are that there will be only a limited amount of
88 * devices that the kernel itself needs to lock in DTLB.
89 *
90 * @param physaddr Physical address of the page where the
91 * device is located. Must be at least
92 * page-aligned.
93 * @param size Size of the device's registers. Must not
94 * exceed 4M and must include extra space
95 * caused by the alignment.
96 *
97 * @return Virtual address of the page where the device is
98 * mapped.
99 */
[7f1c620]100uintptr_t hw_map(uintptr_t physaddr, size_t size)
[c1982e45]101{
102 unsigned int order;
[82da5f5]103 int i;
104
[a9ac978]105 ASSERT(config.cpu_active == 1);
106
[82da5f5]107 struct {
[a9ac978]108 int pagesize_code;
[82da5f5]109 size_t increment;
110 count_t count;
111 } sizemap[] = {
112 { PAGESIZE_8K, 0, 1 }, /* 8K */
113 { PAGESIZE_8K, PAGE_SIZE, 2 }, /* 16K */
114 { PAGESIZE_8K, PAGE_SIZE, 4 }, /* 32K */
115 { PAGESIZE_64K, 0, 1}, /* 64K */
116 { PAGESIZE_64K, 8*PAGE_SIZE, 2 }, /* 128K */
117 { PAGESIZE_64K, 8*PAGE_SIZE, 4 }, /* 256K */
118 { PAGESIZE_512K, 0, 1 }, /* 512K */
119 { PAGESIZE_512K, 64*PAGE_SIZE, 2 }, /* 1M */
120 { PAGESIZE_512K, 64*PAGE_SIZE, 4 }, /* 2M */
121 { PAGESIZE_4M, 0, 1 } /* 4M */
[84060e2]122 { PAGESIZE_4M, 512*PAGE_SIZE, 2 } /* 8M */
[82da5f5]123 };
124
[da74747]125 ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr);
[84060e2]126 ASSERT(size <= 8*1024*1024);
[c1982e45]127
128 if (size <= FRAME_SIZE)
129 order = 0;
130 else
[06e1e95]131 order = (fnzb64(size - 1) + 1) - FRAME_WIDTH;
[82da5f5]132
[c6e314a]133 /*
134 * Use virtual addresses that are beyond the limit of physical memory.
135 * Thus, the physical address space will not be wasted by holes created
136 * by frame_alloc().
137 */
138 ASSERT(last_frame);
139 uintptr_t virtaddr = ALIGN_UP(last_frame, 1<<(order + FRAME_WIDTH));
140 last_frame = ALIGN_UP(virtaddr + size, 1<<(order + FRAME_WIDTH));
141
[a9ac978]142 for (i = 0; i < sizemap[order].count; i++) {
143 /*
144 * First, insert the mapping into DTLB.
145 */
[82da5f5]146 dtlb_insert_mapping(virtaddr + i*sizemap[order].increment,
147 physaddr + i*sizemap[order].increment,
[a9ac978]148 sizemap[order].pagesize_code, true, false);
149
150#ifdef CONFIG_SMP
151 /*
152 * Second, save the information about the mapping for APs.
153 */
154 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page = virtaddr + i*sizemap[order].increment;
155 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page = physaddr + i*sizemap[order].increment;
156 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code = sizemap[order].pagesize_code;
157 bsp_locked_dtlb_entries++;
158#endif
159 }
[c1982e45]160
161 return virtaddr;
162}
[b45c443]163
[c6e314a]164/** @}
[b45c443]165 */
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