[ef67bab] | 1 | /*
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| 2 | * Copyright (C) 2006 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[ed166f7] | 29 | /** @addtogroup sparc64mm
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[ef67bab] | 35 | #include <arch/mm/as.h>
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[ed166f7] | 36 | #include <arch/mm/tlb.h>
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[ef67bab] | 37 | #include <genarch/mm/as_ht.h>
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[d0a0f12] | 38 | #include <genarch/mm/asid_fifo.h>
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[57da95c] | 39 | #include <debug.h>
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[a9ac978] | 40 | #include <config.h>
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[57da95c] | 41 |
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| 42 | #ifdef CONFIG_TSB
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| 43 | #include <arch/mm/tsb.h>
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[29b2bbf] | 44 | #include <arch/memstr.h>
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| 45 | #include <synch/mutex.h>
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| 46 | #include <arch/asm.h>
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| 47 | #include <mm/frame.h>
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| 48 | #include <bitops.h>
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| 49 | #include <macros.h>
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[92778f2] | 50 | #endif /* CONFIG_TSB */
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| 51 |
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[ef67bab] | 52 | /** Architecture dependent address space init. */
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| 53 | void as_arch_init(void)
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| 54 | {
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[a9ac978] | 55 | if (config.cpu_active == 1) {
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| 56 | as_operations = &as_ht_operations;
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| 57 | asid_fifo_init();
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| 58 | }
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[ef67bab] | 59 | }
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[b45c443] | 60 |
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[29b2bbf] | 61 | int as_constructor_arch(as_t *as, int flags)
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| 62 | {
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| 63 | #ifdef CONFIG_TSB
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[771cd22] | 64 | int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
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| 65 | sizeof(tsb_entry_t)) >> FRAME_WIDTH);
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[91d6d28] | 66 | uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
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[29b2bbf] | 67 |
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| 68 | if (!tsb)
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| 69 | return -1;
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| 70 |
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| 71 | as->arch.itsb = (tsb_entry_t *) tsb;
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[771cd22] | 72 | as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
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| 73 | sizeof(tsb_entry_t));
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| 74 | memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT)
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| 75 | * sizeof(tsb_entry_t), 0);
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[29b2bbf] | 76 | #endif
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| 77 | return 0;
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| 78 | }
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| 79 |
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| 80 | int as_destructor_arch(as_t *as)
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| 81 | {
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| 82 | #ifdef CONFIG_TSB
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[771cd22] | 83 | count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
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| 84 | sizeof(tsb_entry_t)) >> FRAME_WIDTH;
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[91d6d28] | 85 | frame_free(KA2PA((uintptr_t) as->arch.itsb));
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[29b2bbf] | 86 | return cnt;
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| 87 | #else
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| 88 | return 0;
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| 89 | #endif
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| 90 | }
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| 91 |
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| 92 | int as_create_arch(as_t *as, int flags)
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| 93 | {
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| 94 | #ifdef CONFIG_TSB
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| 95 | ipl_t ipl;
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| 96 |
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| 97 | ipl = interrupts_disable();
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| 98 | mutex_lock_active(&as->lock); /* completely unnecessary, but polite */
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| 99 | tsb_invalidate(as, 0, (count_t) -1);
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| 100 | mutex_unlock(&as->lock);
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| 101 | interrupts_restore(ipl);
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| 102 | #endif
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| 103 | return 0;
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| 104 | }
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| 105 |
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[771cd22] | 106 | /** Perform sparc64-specific tasks when an address space becomes active on the
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| 107 | * processor.
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[57da95c] | 108 | *
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| 109 | * Install ASID and map TSBs.
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| 110 | *
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| 111 | * @param as Address space.
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| 112 | */
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[ed166f7] | 113 | void as_install_arch(as_t *as)
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| 114 | {
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| 115 | tlb_context_reg_t ctx;
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| 116 |
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[57da95c] | 117 | /*
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| 118 | * Note that we don't lock the address space.
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| 119 | * That's correct - we can afford it here
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| 120 | * because we only read members that are
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| 121 | * currently read-only.
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| 122 | */
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| 123 |
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[ed166f7] | 124 | /*
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| 125 | * Write ASID to secondary context register.
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| 126 | * The primary context register has to be set
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| 127 | * from TL>0 so it will be filled from the
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| 128 | * secondary context register from the TL=1
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| 129 | * code just before switch to userspace.
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| 130 | */
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| 131 | ctx.v = 0;
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| 132 | ctx.context = as->asid;
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| 133 | mmu_secondary_context_write(ctx.v);
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[57da95c] | 134 |
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| 135 | #ifdef CONFIG_TSB
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[29b2bbf] | 136 | uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
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[57da95c] | 137 |
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[29b2bbf] | 138 | ASSERT(as->arch.itsb && as->arch.dtsb);
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[57da95c] | 139 |
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[29b2bbf] | 140 | uintptr_t tsb = (uintptr_t) as->arch.itsb;
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[57da95c] | 141 |
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[771cd22] | 142 | if (!overlaps(tsb, 8 * PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
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[57da95c] | 143 | /*
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[29b2bbf] | 144 | * TSBs were allocated from memory not covered
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| 145 | * by the locked 4M kernel DTLB entry. We need
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| 146 | * to map both TSBs explicitly.
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[57da95c] | 147 | */
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[29b2bbf] | 148 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
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| 149 | dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
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[57da95c] | 150 | }
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[29b2bbf] | 151 |
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| 152 | /*
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| 153 | * Setup TSB Base registers.
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| 154 | */
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| 155 | tsb_base_reg_t tsb_base;
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| 156 |
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| 157 | tsb_base.value = 0;
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| 158 | tsb_base.size = TSB_SIZE;
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| 159 | tsb_base.split = 0;
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| 160 |
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| 161 | tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH;
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| 162 | itsb_base_write(tsb_base.value);
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| 163 | tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH;
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| 164 | dtsb_base_write(tsb_base.value);
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[57da95c] | 165 | #endif
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| 166 | }
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| 167 |
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[771cd22] | 168 | /** Perform sparc64-specific tasks when an address space is removed from the
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| 169 | * processor.
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[57da95c] | 170 | *
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| 171 | * Demap TSBs.
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| 172 | *
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| 173 | * @param as Address space.
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| 174 | */
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| 175 | void as_deinstall_arch(as_t *as)
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| 176 | {
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| 177 |
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| 178 | /*
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| 179 | * Note that we don't lock the address space.
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| 180 | * That's correct - we can afford it here
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| 181 | * because we only read members that are
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| 182 | * currently read-only.
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| 183 | */
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| 184 |
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| 185 | #ifdef CONFIG_TSB
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[29b2bbf] | 186 | uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
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[57da95c] | 187 |
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[29b2bbf] | 188 | ASSERT(as->arch.itsb && as->arch.dtsb);
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[57da95c] | 189 |
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[29b2bbf] | 190 | uintptr_t tsb = (uintptr_t) as->arch.itsb;
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[57da95c] | 191 |
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[771cd22] | 192 | if (!overlaps(tsb, 8 * PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
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[29b2bbf] | 193 | /*
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| 194 | * TSBs were allocated from memory not covered
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| 195 | * by the locked 4M kernel DTLB entry. We need
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| 196 | * to demap the entry installed by as_install_arch().
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| 197 | */
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| 198 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
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[57da95c] | 199 | }
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| 200 | #endif
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[ed166f7] | 201 | }
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| 202 |
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| 203 | /** @}
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[b45c443] | 204 | */
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