source: mainline/kernel/arch/sparc64/src/drivers/tick.c@ 06e1e95

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06e1e95 was 9a5b556, checked in by Jakub Jermar <jakub@…>, 19 years ago

sparc64 work:

  • find a CPU node and read its clock_frequency attribute
  • implement asm_delay_loop()
  • set TICK_COMPARE register according to processor frequency
  • small improvements at random places

OpenFirmware work:

  • two new functions for walking the device tree

Generic boot loader work:

  • added basic string functions

Usual pile of indentation and formatting fixes.

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/drivers/tick.h>
36#include <arch/interrupt.h>
37#include <arch/asm.h>
38#include <arch/register.h>
39#include <typedefs.h>
40#include <arch/cpu.h>
41#include <arch/boot/boot.h>
42#include <time/clock.h>
43#include <arch.h>
44#include <debug.h>
45
46#define TICK_RESTART_TIME 50 /* Worst case estimate. */
47
48/** Initialize tick interrupt. */
49void tick_init(void)
50{
51 tick_compare_reg_t compare;
52
53 interrupt_register(14, "tick_int", tick_interrupt);
54 compare.int_dis = false;
55 compare.tick_cmpr = bootinfo.processor.clock_frequency/HZ;
56 tick_compare_write(compare.value);
57 tick_write(0);
58}
59
60/** Process tick interrupt.
61 *
62 * @param n Interrupt Level, 14, (can be ignored)
63 * @param istate Interrupted state.
64 */
65void tick_interrupt(int n, istate_t *istate)
66{
67 softint_reg_t softint, clear;
68 uint64_t next, compare, start, stop;
69
70 softint.value = softint_read();
71
72 /*
73 * Make sure we are servicing interrupt_level_14
74 */
75 ASSERT(n == 14);
76
77 /*
78 * Make sure we are servicing TICK_INT.
79 */
80 ASSERT(softint.tick_int);
81
82 /*
83 * Clear tick interrupt.
84 */
85 clear.value = 0;
86 clear.tick_int = 1;
87 clear_softint_write(clear.value);
88
89 /*
90 * Restart counter.
91 */
92 compare = CPU->arch.clock_frequency/HZ;
93 start = tick_read();
94 next = start - compare;
95 while (next >= compare - TICK_RESTART_TIME) {
96 next -= compare;
97 CPU->missed_clock_ticks++;
98 }
99 stop = tick_read();
100 tick_write(next + (stop - start));
101
102 clock();
103}
104
105/** @}
106 */
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