source: mainline/kernel/arch/sparc64/src/drivers/fhc.c@ 8d2760f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 8d2760f was 8d2760f, checked in by Jakub Jermar <jakub@…>, 17 years ago

Add additional members to the irq_t structure so that an interrupt-driven driver
does not need to know how to clear the level interrupt. The z8530 was modified
in this way and is much more generic. The ns16550 driver has also been modified,
but awaits testing. The sparc64 interrupt mapping and dispatch code is now using
the new info and calls the clear-interrupt-routine itself.

  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 * Copyright (c) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/**
33 * @file
34 * @brief FireHose Controller (FHC) driver.
35 *
36 * Note that this driver is a result of reverse engineering
37 * rather than implementation of a specification. This
38 * is due to the fact that the FHC documentation is not
39 * publicly available.
40 */
41
42#include <arch/drivers/fhc.h>
43#include <arch/trap/interrupt.h>
44#include <mm/page.h>
45#include <mm/slab.h>
46#include <arch/types.h>
47#include <genarch/ofw/ofw_tree.h>
48
49fhc_t *central_fhc = NULL;
50
51/**
52 * I suspect this must be hardcoded in the FHC.
53 * If it is not, than we can read all IMAP registers
54 * and get the complete mapping.
55 */
56#define FHC_UART_INR 0x39
57
58#define FHC_UART_IMAP 0x0
59#define FHC_UART_ICLR 0x4
60
61#define UART_IMAP_REG 4
62
63fhc_t *fhc_init(ofw_tree_node_t *node)
64{
65 fhc_t *fhc;
66 ofw_tree_property_t *prop;
67
68 prop = ofw_tree_getprop(node, "reg");
69
70 if (!prop || !prop->value)
71 return NULL;
72
73 count_t regs = prop->size / sizeof(ofw_central_reg_t);
74 if (regs + 1 < UART_IMAP_REG)
75 return NULL;
76
77 ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG];
78
79 uintptr_t paddr;
80 if (!ofw_central_apply_ranges(node->parent, reg, &paddr))
81 return NULL;
82
83 fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC);
84 if (!fhc)
85 return NULL;
86
87 fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
88
89 return fhc;
90}
91
92void fhc_enable_interrupt(fhc_t *fhc, int inr)
93{
94 switch (inr) {
95 case FHC_UART_INR:
96 fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK;
97 break;
98 default:
99 panic("Unexpected INR (%d)\n", inr);
100 break;
101 }
102}
103
104void fhc_clear_interrupt(void *fhcp, int inr)
105{
106 fhc_t *fhc = (fhc_t *)fhcp;
107 ASSERT(fhc->uart_imap);
108
109 switch (inr) {
110 case FHC_UART_INR:
111 fhc->uart_imap[FHC_UART_ICLR] = 0;
112 break;
113 default:
114 panic("Unexpected INR (%d)\n", inr);
115 break;
116 }
117}
118
119/** @}
120 */
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