[f9a56c0] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[f9a56c0] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup sparc64
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| 30 | * @{
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| 31 | */
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| 32 | /**
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| 33 | * @file
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| 34 | * @brief FireHose Controller (FHC) driver.
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| 35 | *
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| 36 | * Note that this driver is a result of reverse engineering
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| 37 | * rather than implementation of a specification. This
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| 38 | * is due to the fact that the FHC documentation is not
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| 39 | * publicly available.
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| 40 | */
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| 41 |
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| 42 | #include <arch/drivers/fhc.h>
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[8cee705] | 43 | #include <arch/trap/interrupt.h>
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[b3f8fb7] | 44 | #include <mm/page.h>
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[0b414b5] | 45 | #include <mm/slab.h>
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[f9a56c0] | 46 | #include <arch/types.h>
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[0b414b5] | 47 | #include <genarch/ofw/ofw_tree.h>
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[f9a56c0] | 48 |
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[0b414b5] | 49 | fhc_t *central_fhc = NULL;
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[f9a56c0] | 50 |
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[0b414b5] | 51 | /**
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| 52 | * I suspect this must be hardcoded in the FHC.
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| 53 | * If it is not, than we can read all IMAP registers
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| 54 | * and get the complete mapping.
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| 55 | */
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[233af8c5] | 56 | #define FHC_UART_INR 0x39
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[f9a56c0] | 57 |
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| 58 | #define FHC_UART_IMAP 0x0
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| 59 | #define FHC_UART_ICLR 0x4
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| 60 |
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[0b414b5] | 61 | #define UART_IMAP_REG 4
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| 62 |
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| 63 | fhc_t *fhc_init(ofw_tree_node_t *node)
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[f9a56c0] | 64 | {
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[0b414b5] | 65 | fhc_t *fhc;
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| 66 | ofw_tree_property_t *prop;
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| 67 |
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| 68 | prop = ofw_tree_getprop(node, "reg");
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| 69 |
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| 70 | if (!prop || !prop->value)
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| 71 | return NULL;
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| 72 |
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| 73 | count_t regs = prop->size / sizeof(ofw_central_reg_t);
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| 74 | if (regs + 1 < UART_IMAP_REG)
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| 75 | return NULL;
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| 76 |
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| 77 | ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG];
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[f9a56c0] | 78 |
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[0b414b5] | 79 | uintptr_t paddr;
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| 80 | if (!ofw_central_apply_ranges(node->parent, reg, &paddr))
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| 81 | return NULL;
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| 82 |
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| 83 | fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC);
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| 84 | if (!fhc)
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| 85 | return NULL;
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| 86 |
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| 87 | fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
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| 88 |
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| 89 | return fhc;
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| 90 | }
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| 91 |
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[233af8c5] | 92 | void fhc_enable_interrupt(fhc_t *fhc, int inr)
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[0b414b5] | 93 | {
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[233af8c5] | 94 | switch (inr) {
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| 95 | case FHC_UART_INR:
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[8cee705] | 96 | fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK;
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[0b414b5] | 97 | break;
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| 98 | default:
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[f651e80] | 99 | panic("Unexpected INR (%d).", inr);
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[0b414b5] | 100 | break;
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| 101 | }
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[f9a56c0] | 102 | }
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| 103 |
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[8d2760f] | 104 | void fhc_clear_interrupt(void *fhcp, int inr)
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[f9a56c0] | 105 | {
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[8d2760f] | 106 | fhc_t *fhc = (fhc_t *)fhcp;
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[0b414b5] | 107 | ASSERT(fhc->uart_imap);
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| 108 |
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[233af8c5] | 109 | switch (inr) {
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| 110 | case FHC_UART_INR:
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[0b414b5] | 111 | fhc->uart_imap[FHC_UART_ICLR] = 0;
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| 112 | break;
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| 113 | default:
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[f651e80] | 114 | panic("Unexpected INR (%d).", inr);
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[0b414b5] | 115 | break;
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| 116 | }
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[f9a56c0] | 117 | }
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| 118 |
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| 119 | /** @}
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| 120 | */
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