source: mainline/kernel/arch/sparc64/src/cpu/cpu.c@ f2ea5d8

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f2ea5d8 was 84060e2, checked in by Jakub Jermar <jakub@…>, 19 years ago

sparc64 work:

  • hw_map() can now support up to 8M requests
  • CPU stacks are now locked in DTLB of the respective processor
  • kernel in the boot phase no longer relies on the stack provided by OpenFirmware
  • instead of of doing FLUSHW during kernel startup, simply set the window state registers to the wanted state
  • NWINDOW → NWINDOWS
  • Add/fix some comments and copyrights.
  • Property mode set to 100644
File size: 4.3 KB
RevLine 
[2cf87e50]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[1bb2e7a]29/** @addtogroup sparc64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[9a5b556]35#include <arch/asm.h>
[2cf87e50]36#include <cpu.h>
37#include <arch.h>
38#include <print.h>
[45b26dad]39#include <arch/register.h>
40#include <genarch/ofw/ofw_tree.h>
41#include <arch/types.h>
42#include <arch/drivers/tick.h>
[84060e2]43#include <arch/mm/page.h>
44#include <arch/mm/tlb.h>
45#include <macros.h>
[2cf87e50]46
[45b26dad]47/** Perform sparc64 specific initialization of the processor structure for the current processor. */
[2cf87e50]48void cpu_arch_init(void)
49{
[45b26dad]50 ofw_tree_node_t *node;
51 uint32_t mid;
52 uint32_t clock_frequency = 0;
53 upa_config_t upa_config;
54
55 upa_config.value = upa_config_read();
[a9ac978]56 CPU->arch.mid = upa_config.mid;
57
[84060e2]58 /*
59 * Detect processor frequency.
60 */
[45b26dad]61 node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
62 while (node) {
63 ofw_tree_property_t *prop;
64
65 prop = ofw_tree_getprop(node, "upa-portid");
66 if (prop && prop->value) {
67 mid = *((uint32_t *) prop->value);
[a9ac978]68 if (mid == CPU->arch.mid) {
[45b26dad]69 prop = ofw_tree_getprop(node, "clock-frequency");
70 if (prop && prop->value)
71 clock_frequency = *((uint32_t *) prop->value);
72 }
73 }
74 node = ofw_tree_find_peer_by_device_type(node, "cpu");
75 }
76
77 CPU->arch.clock_frequency = clock_frequency;
78 tick_init();
[84060e2]79
80 /*
81 * Lock CPU stack in DTLB.
82 */
83 uintptr_t base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
84
85 if (!overlaps((uintptr_t) CPU->stack, PAGE_SIZE, base, (1<<KERNEL_PAGE_WIDTH))) {
86 /*
87 * Kernel stack of this processor is not locked in DTLB.
88 * First, demap any already existing mappings.
89 * Second, create a locked mapping for it.
90 */
91 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, (uintptr_t) CPU->stack);
92 dtlb_insert_mapping((uintptr_t) CPU->stack, KA2PA(CPU->stack), PAGESIZE_8K, true, true);
93 }
94
[2cf87e50]95}
96
[45b26dad]97/** Read version information from the current processor. */
[2cf87e50]98void cpu_identify(void)
99{
100 CPU->arch.ver.value = ver_read();
101}
102
[45b26dad]103/** Print version information for a processor.
[a9ac978]104 *
105 * This function is called by the bootstrap processor.
[45b26dad]106 *
107 * @param m Processor structure of the CPU for which version information is to be printed.
108 */
[2cf87e50]109void cpu_print_report(cpu_t *m)
110{
111 char *manuf, *impl;
112
[a9ac978]113 switch (m->arch.ver.manuf) {
114 case MANUF_FUJITSU:
[2cf87e50]115 manuf = "Fujitsu";
116 break;
[a9ac978]117 case MANUF_ULTRASPARC:
[2cf87e50]118 manuf = "UltraSPARC";
119 break;
[a9ac978]120 case MANUF_SUN:
[2cf87e50]121 manuf = "Sun";
122 break;
[a9ac978]123 default:
[2cf87e50]124 manuf = "Unknown";
125 break;
126 }
127
128 switch (CPU->arch.ver.impl) {
[a9ac978]129 case IMPL_ULTRASPARCI:
[2cf87e50]130 impl = "UltraSPARC I";
131 break;
[a9ac978]132 case IMPL_ULTRASPARCII:
[2cf87e50]133 impl = "UltraSPARC II";
134 break;
[a9ac978]135 case IMPL_ULTRASPARCII_I:
[2cf87e50]136 impl = "UltraSPARC IIi";
137 break;
[a9ac978]138 case IMPL_ULTRASPARCII_E:
[2cf87e50]139 impl = "UltraSPARC IIe";
140 break;
[a9ac978]141 case IMPL_ULTRASPARCIII:
[2cf87e50]142 impl = "UltraSPARC III";
143 break;
[a9ac978]144 case IMPL_ULTRASPARCIV_PLUS:
[2cf87e50]145 impl = "UltraSPARC IV+";
146 break;
[a9ac978]147 case IMPL_SPARC64V:
[2cf87e50]148 impl = "SPARC 64V";
149 break;
[a9ac978]150 default:
[2cf87e50]151 impl = "Unknown";
152 break;
153 }
154
[9a5b556]155 printf("cpu%d: manuf=%s, impl=%s, mask=%d (%dMHz)\n",
[a9ac978]156 m->id, manuf, impl, m->arch.ver.mask, m->arch.clock_frequency/1000000);
[2cf87e50]157}
[b45c443]158
[1bb2e7a]159/** @}
[b45c443]160 */
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