source: mainline/kernel/arch/sparc64/src/cpu/cpu.c@ c23baab

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c23baab was a9ac978, checked in by Jakub Jermar <jakub@…>, 19 years ago

SMP stuff for sparc64.
Almost complete except for IPIs.
The absence of IPI support deadlocks
the kernel when more CPUs are configured.

  • Property mode set to 100644
File size: 3.7 KB
RevLine 
[2cf87e50]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[1bb2e7a]29/** @addtogroup sparc64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[9a5b556]35#include <arch/asm.h>
[2cf87e50]36#include <cpu.h>
37#include <arch.h>
38#include <print.h>
[45b26dad]39#include <arch/register.h>
40#include <genarch/ofw/ofw_tree.h>
41#include <arch/types.h>
42#include <arch/drivers/tick.h>
[2cf87e50]43
[45b26dad]44/** Perform sparc64 specific initialization of the processor structure for the current processor. */
[2cf87e50]45void cpu_arch_init(void)
46{
[45b26dad]47 ofw_tree_node_t *node;
48 uint32_t mid;
49 uint32_t clock_frequency = 0;
50 upa_config_t upa_config;
51
52 upa_config.value = upa_config_read();
[a9ac978]53 CPU->arch.mid = upa_config.mid;
54
[45b26dad]55 node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
56 while (node) {
57 ofw_tree_property_t *prop;
58
59 prop = ofw_tree_getprop(node, "upa-portid");
60 if (prop && prop->value) {
61 mid = *((uint32_t *) prop->value);
[a9ac978]62 if (mid == CPU->arch.mid) {
[45b26dad]63 prop = ofw_tree_getprop(node, "clock-frequency");
64 if (prop && prop->value)
65 clock_frequency = *((uint32_t *) prop->value);
66 }
67 }
68 node = ofw_tree_find_peer_by_device_type(node, "cpu");
69 }
70
71 CPU->arch.clock_frequency = clock_frequency;
72 tick_init();
[2cf87e50]73}
74
[45b26dad]75/** Read version information from the current processor. */
[2cf87e50]76void cpu_identify(void)
77{
78 CPU->arch.ver.value = ver_read();
79}
80
[45b26dad]81/** Print version information for a processor.
[a9ac978]82 *
83 * This function is called by the bootstrap processor.
[45b26dad]84 *
85 * @param m Processor structure of the CPU for which version information is to be printed.
86 */
[2cf87e50]87void cpu_print_report(cpu_t *m)
88{
89 char *manuf, *impl;
90
[a9ac978]91 switch (m->arch.ver.manuf) {
92 case MANUF_FUJITSU:
[2cf87e50]93 manuf = "Fujitsu";
94 break;
[a9ac978]95 case MANUF_ULTRASPARC:
[2cf87e50]96 manuf = "UltraSPARC";
97 break;
[a9ac978]98 case MANUF_SUN:
[2cf87e50]99 manuf = "Sun";
100 break;
[a9ac978]101 default:
[2cf87e50]102 manuf = "Unknown";
103 break;
104 }
105
106 switch (CPU->arch.ver.impl) {
[a9ac978]107 case IMPL_ULTRASPARCI:
[2cf87e50]108 impl = "UltraSPARC I";
109 break;
[a9ac978]110 case IMPL_ULTRASPARCII:
[2cf87e50]111 impl = "UltraSPARC II";
112 break;
[a9ac978]113 case IMPL_ULTRASPARCII_I:
[2cf87e50]114 impl = "UltraSPARC IIi";
115 break;
[a9ac978]116 case IMPL_ULTRASPARCII_E:
[2cf87e50]117 impl = "UltraSPARC IIe";
118 break;
[a9ac978]119 case IMPL_ULTRASPARCIII:
[2cf87e50]120 impl = "UltraSPARC III";
121 break;
[a9ac978]122 case IMPL_ULTRASPARCIV_PLUS:
[2cf87e50]123 impl = "UltraSPARC IV+";
124 break;
[a9ac978]125 case IMPL_SPARC64V:
[2cf87e50]126 impl = "SPARC 64V";
127 break;
[a9ac978]128 default:
[2cf87e50]129 impl = "Unknown";
130 break;
131 }
132
[9a5b556]133 printf("cpu%d: manuf=%s, impl=%s, mask=%d (%dMHz)\n",
[a9ac978]134 m->id, manuf, impl, m->arch.ver.mask, m->arch.clock_frequency/1000000);
[2cf87e50]135}
[b45c443]136
[1bb2e7a]137/** @}
[b45c443]138 */
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