source: mainline/kernel/arch/sparc64/src/asm.S@ beb3926a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since beb3926a was e11ae91, checked in by Jakub Jermar <jakub@…>, 19 years ago

sparc64 work.

  • Modify before_thread_runs_arch() to store addresses of the kernel stack and

userspace window buffer, resp., to registers %g6 and %g7, resp, in the
alternate and interrupt global sets.

  • Modify after_thread_ran_arch() to sample %g7 from the alternate globals.
  • Implement trap handler for spilling register windows into userspace window buffer.
  • Implement assembly language functions to access %g6 and %g7 registers in the alternate sets.
  • Initialize the trap table so that there are now also spill_1_normal, spill_2_normal,

spill_0_other and fill_1_normal handlers. These handlers are used in different situations
and for different purposes.

  • Property mode set to 100644
File size: 3.4 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/stack.h>
30#include <arch/regdef.h>
31
32.text
33
34.global memcpy
35.global memcpy_from_uspace
36.global memcpy_to_uspace
37.global memcpy_from_uspace_failover_address
38.global memcpy_to_uspace_failover_address
39.global memsetb
40
41
42memcpy:
43memcpy_from_uspace:
44memcpy_to_uspace:
45 .register %g2, #scratch
46 .register %g3, #scratch
47 add %o1, 7, %g1
48 and %g1, -8, %g1
49 cmp %o1, %g1
50 be,pn %xcc, 3f
51 add %o0, 7, %g1
52 mov 0, %g3
530:
54 brz,pn %o2, 2f
55 mov 0, %g2
561:
57 ldub [%g3 + %o1], %g1
58 add %g2, 1, %g2
59 cmp %o2, %g2
60 stb %g1, [%g3 + %o0]
61 bne,pt %xcc, 1b
62 mov %g2, %g3
632:
64 jmp %o7 + 8 ! exit point
65 mov %o1, %o0
663:
67 and %g1, -8, %g1
68 cmp %o0, %g1
69 bne,pt %xcc, 0b
70 mov 0, %g3
71 srlx %o2, 3, %g4
72 brz,pn %g4, 5f
73 mov 0, %g5
744:
75 sllx %g3, 3, %g2
76 add %g5, 1, %g3
77 ldx [%o1 + %g2], %g1
78 mov %g3, %g5
79 cmp %g4, %g3
80 bne,pt %xcc, 4b
81 stx %g1, [%o0 + %g2]
825:
83 and %o2, 7, %o2
84 brz,pn %o2, 2b
85 sllx %g4, 3, %g1
86 mov 0, %g2
87 add %g1, %o0, %o0
88 add %g1, %o1, %g4
89 mov 0, %g3
906:
91 ldub [%g2 + %g4], %g1
92 stb %g1, [%g2 + %o0]
93 add %g3, 1, %g2
94 cmp %o2, %g2
95 bne,pt %xcc, 6b
96 mov %g2, %g3
97
98 jmp %o7 + 8 ! exit point
99 mov %o1, %o0
100
101memcpy_from_uspace_failover_address:
102memcpy_to_uspace_failover_address:
103 jmp %o7 + 8 ! exit point
104 mov %g0, %o0 ! return 0 on failure
105
106memsetb:
107 b _memsetb
108 nop
109
110
111.macro WRITE_ALTERNATE_REGISTER reg, bit
112 save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
113 rdpr %pstate, %l0
114 wrpr %l0, \bit, %pstate
115 mov %i0, \reg
116 wrpr %l0, 0, %pstate
117 ret
118 restore
119.endm
120
121.macro READ_ALTERNATE_REGISTER reg, bit
122 save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
123 rdpr %pstate, %l0
124 wrpr %l0, \bit, %pstate
125 mov \reg, %i0
126 wrpr %l0, 0, %pstate
127 ret
128 restore
129.endm
130
131.global write_to_ag_g6
132write_to_ag_g6:
133 WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT
134
135.global write_to_ag_g7
136write_to_ag_g7:
137 WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
138
139.global write_to_ig_g6
140write_to_ig_g6:
141 WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT
142
143.global read_from_ag_g7
144read_from_ag_g7:
145 READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
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