source:
mainline/kernel/arch/sparc64/include/trap@
9a8baed
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| exception.h | 3.5 KB | 34d9469e | 19 years | More sparc64 FPU trap handlers. | |
| interrupt.h | 3.5 KB | e2cc9a0 | 19 years | Add support for interrupt mapping in the Sabre PCI controller. Add … | |
| mmu.h | 4.6 KB | f2ea5d8 | 19 years | sparc64 code to support physical memory that starts on non-zero … | |
| regwin.h | 7.0 KB | ed166f7 | 19 years | A lot of untested sparc64 stuff: - Write ASID to hardware when a … | |
| syscall.h | 2.0 KB | 002e613 | 19 years | Allow architectures to decide between inlined and not inlined version … | |
| trap.h | 1.6 KB | ed166f7 | 19 years | A lot of untested sparc64 stuff: - Write ASID to hardware when a … | |
| trap_table.h | 2.9 KB | 7ba7c6d | 19 years | A quote from from SPARC V9 specification: The Y register is … | |
|
Note:
See TracBrowser
for help on using the repository browser.
