source: mainline/kernel/arch/sparc64/include/trap/exception.h@ 6767c1d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 6767c1d was 6767c1d, checked in by Jakub Jermar <jakub@…>, 19 years ago

Convert sparc64 traps using SIMPLE_HANDLER to using PREEMPTIBLE_HANDLER.

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64interrupt
30 * @{
31 */
32/**
33 * @file
34 */
35
36#ifndef KERN_sparc64_EXCEPTION_H_
37#define KERN_sparc64_EXCEPTION_H_
38
39#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08
40#define TT_ILLEGAL_INSTRUCTION 0x10
41#define TT_DATA_ACCESS_ERROR 0x32
42#define TT_MEM_ADDRESS_NOT_ALIGNED 0x34
43
44#ifndef __ASM__
45
46#include <typedefs.h>
47
48extern void do_instruction_access_exc(int n, istate_t *istate);
49extern void do_mem_address_not_aligned(int n, istate_t *istate);
50extern void do_data_access_error(int n, istate_t *istate);
51extern void do_illegal_instruction(int n, istate_t *istate);
52
53#endif /* !__ASM__ */
54
55#endif
56
57/** @}
58 */
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