source: mainline/kernel/arch/sparc64/include/sun4v/hypercall.h@ af24629

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since af24629 was d99c1d2, checked in by Martin Decky <martin@…>, 15 years ago

use [u]int{8|16|32|64}_t type definitions as detected by the autotool
replace direct usage of arch/types.h with typedefs.h
  • Property mode set to 100644
File size: 8.2 KB
Line 
1/*
2 * Copyright (c) 2008 Pavel Rimsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/**
33 * @file
34 * @brief Macros, constants and functions needed to perform a call to the
35 * hypervisor API. For details and terminology see this document:
36 * UltraSPARC Virtual Machine Specification (The Hypervisor API
37 * specification for Logical Domains).
38 *
39 */
40
41#ifndef KERN_sparc64_sun4v_HYPERCALL_H_
42#define KERN_sparc64_sun4v_HYPERCALL_H_
43
44/* SW trap numbers for hyperfast traps */
45#define FAST_TRAP 0x80
46#define MMU_MAP_ADDR 0x83
47#define MMU_UNMAP_ADDR 0x84
48
49/* function codes for fast traps */
50#define MACH_DESC 0x01
51#define CPU_START 0x10
52#define CPU_STOP 0x11
53#define CPU_YIELD 0x12
54#define CPU_QCONF 0x14
55#define CPU_MYID 0x16
56#define CPU_STATE 0x17
57#define CPU_SET_RTBA 0x18
58#define CPU_GET_RTBA 0x19
59#define MMU_TSB_CTX0 0x20
60#define MMU_TSB_CTXNON0 0x21
61#define MMU_DEMAP_PAGE 0x22
62#define MMU_DEMAP_CTX 0x23
63#define MMU_DEMAP_ALL 0x24
64#define MMU_MAP_PERM_ADDR 0x25
65#define MMU_FAULT_AREA_CONF 0x26
66#define MMU_ENABLE 0x27
67#define MMU_UNMAP_PERM_ADDR 0x28
68#define MMU_TSB_CTX0_INFO 0x29
69#define MMU_TSB_CTXNON0_INFO 0x2a
70#define MMU_FAULT_AREA_INFO 0x2b
71#define CPU_MONDO_SEND 0x42
72#define CONS_GETCHAR 0x60
73#define CONS_PUTCHAR 0x61
74
75
76/* return codes */
77#define HV_EOK 0 /**< Successful return */
78#define HV_ENOCPU 1 /**< Invalid CPU id */
79#define HV_ENORADDR 2 /**< Invalid real address */
80#define HV_ENOINTR 3 /**< Invalid interrupt id */
81#define HV_EBADPGSZ 4 /**< Invalid pagesize encoding */
82#define HV_EBADTSB 5 /**< Invalid TSB description */
83#define HV_EINVAL 6 /**< Invalid argument */
84#define HV_EBADTRAP 7 /**< Invalid function number */
85#define HV_EBADALIGN 8 /**< Invalid address alignment */
86#define HV_EWOULDBLOCK 9 /**< Cannot complete operation without blocking */
87#define HV_ENOACCESS 10 /**< No access to specified resource */
88#define HV_EIO 11 /**< I/O Error */
89#define HV_ECPUERROR 12 /**< CPU is in error state */
90#define HV_ENOTSUPPORTED 13 /**< Function not supported */
91#define HV_ENOMAP 14 /**< No mapping found */
92#define HV_ETOOMANY 15 /**< Too many items specified / limit reached */
93#define HV_ECHANNEL 16 /**< Invalid LDC channel */
94#define HV_EBUSY 17 /**< Operation failed as resource is otherwise busy */
95
96
97/**
98 * Performs a hyperfast hypervisor API call from the assembly language code.
99 * Expects the registers %o1-%o4 are properly filled with the arguments of the
100 * call.
101 *
102 * @param function_number hyperfast call function number
103 */
104#define __HYPERCALL_FAST(function_number) \
105 set function_number, %o5; \
106 ta FAST_TRAP;
107
108/**
109 * Performs a fast hypervisor API call from the assembly language code.
110 * Expects the registers %o1-%o4 are properly filled with the arguments of the
111 * call.
112 *
113 * @param sw_trap_number software trap number
114 */
115#define __HYPERCALL_HYPERFAST(sw_trap_number) \
116 ta (sw_trap_number);
117
118
119#ifndef __ASM__
120
121#include <typedefs.h>
122
123/*
124 * Macros to be used from the C-language code; __hypercall_fastN performs
125 * a fast hypervisor API call taking exactly N arguments.
126 */
127
128#define __hypercall_fast0(function_number) \
129 __hypercall_fast(0, 0, 0, 0, 0, function_number)
130#define __hypercall_fast1(function_number, p1) \
131 __hypercall_fast(p1, 0, 0, 0, 0, function_number)
132#define __hypercall_fast2(function_number, p1, p2) \
133 __hypercall_fast(p1, p2, 0, 0, 0, function_number)
134#define __hypercall_fast3(function_number, p1, p2, p3) \
135 __hypercall_fast(p1, p2, p3, 0, 0, function_number)
136#define __hypercall_fast4(function_number, p1, p2, p3, p4) \
137 __hypercall_fast(p1, p2, p3, p4, 0, function_number)
138#define __hypercall_fast5(function_number, p1, p2, p3, p4, p5) \
139 __hypercall_fast(p1, p2, p3, p4, p5, function_number)
140
141/**
142 * Performs a fast hypervisor API call which returns no value except for the
143 * error status.
144 *
145 * @param p1 the 1st argument of the hypervisor API call
146 * @param p2 the 2nd argument of the hypervisor API call
147 * @param p3 the 3rd argument of the hypervisor API call
148 * @param p4 the 4th argument of the hypervisor API call
149 * @param p5 the 5th argument of the hypervisor API call
150 * @param function_number function number of the call
151 * @return error status
152 */
153static inline uint64_t
154__hypercall_fast(const uint64_t p1, const uint64_t p2, const uint64_t p3,
155 const uint64_t p4, const uint64_t p5, const uint64_t function_number)
156{
157 register uint64_t a6 asm("o5") = function_number;
158 register uint64_t a1 asm("o0") = p1;
159 register uint64_t a2 asm("o1") = p2;
160 register uint64_t a3 asm("o2") = p3;
161 register uint64_t a4 asm("o3") = p4;
162 register uint64_t a5 asm("o4") = p5;
163
164 asm volatile (
165 "ta %7\n"
166 : "=r" (a1)
167 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6),
168 "i" (FAST_TRAP)
169 : "memory"
170 );
171
172 return a1;
173}
174
175/**
176 * Performs a fast hypervisor API call which can return a value.
177 *
178 * @param p1 the 1st argument of the hypervisor API call
179 * @param p2 the 2nd argument of the hypervisor API call
180 * @param p3 the 3rd argument of the hypervisor API call
181 * @param p4 the 4th argument of the hypervisor API call
182 * @param p5 the 5th argument of the hypervisor API call
183 * @param function_number function number of the call
184 * @param ret1 pointer to an address where the return value
185 * of the hypercall should be saved, or NULL
186 * @return error status
187 */
188static inline uint64_t
189__hypercall_fast_ret1(const uint64_t p1, const uint64_t p2, const uint64_t p3,
190 const uint64_t p4, const uint64_t p5, const uint64_t function_number,
191 uint64_t *ret1)
192{
193 register uint64_t a6 asm("o5") = function_number;
194 register uint64_t a1 asm("o0") = p1;
195 register uint64_t a2 asm("o1") = p2;
196 register uint64_t a3 asm("o2") = p3;
197 register uint64_t a4 asm("o3") = p4;
198 register uint64_t a5 asm("o4") = p5;
199
200 asm volatile (
201 "ta %8\n"
202 : "=r" (a1), "=r" (a2)
203 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6),
204 "i" (FAST_TRAP)
205 : "memory"
206 );
207
208 if (ret1)
209 *ret1 = a2;
210
211 return a1;
212}
213
214/**
215 * Performs a hyperfast hypervisor API call.
216 *
217 * @param p1 the 1st argument of the hypervisor API call
218 * @param p2 the 2nd argument of the hypervisor API call
219 * @param p3 the 3rd argument of the hypervisor API call
220 * @param p4 the 4th argument of the hypervisor API call
221 * @param p5 the 5th argument of the hypervisor API call
222 * @param sw_trap_number software trap number
223 */
224static inline uint64_t
225__hypercall_hyperfast(const uint64_t p1, const uint64_t p2, const uint64_t p3,
226 const uint64_t p4, const uint64_t p5, const uint64_t sw_trap_number)
227{
228 register uint64_t a1 asm("o0") = p1;
229 register uint64_t a2 asm("o1") = p2;
230 register uint64_t a3 asm("o2") = p3;
231 register uint64_t a4 asm("o3") = p4;
232 register uint64_t a5 asm("o4") = p5;
233
234 asm volatile (
235 "ta %6\n"
236 : "=r" (a1)
237 : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5),
238 "i" (sw_trap_number)
239 : "memory"
240 );
241
242 return a1;
243}
244
245#endif /* ASM */
246
247#endif
248
249/** @}
250 */
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